Introspect DDR5/LPDDR5/LPDDR6 DRAM/RDIMM/MR-DIMM/RCD/DB芯片/器件内存接口测试

加拿大Introspect公司针对DDR5/LPDDR5/LPDDR6 DRAM, RCD, DB芯片/器件及针对DDR5/LPDDR系统级产品MR-DIMM, UDIMM提供了业界最完整的测试解决方案。

针对LPDDR5/LPDDR5X系统级协议层故障定位与调试，提供了业界第一台支持8533 datarate下LPDDR5/5X所有数据封包及命令的抓取及协议解析，支持所有的DQ Burst Capture (Data Write/Read), 

CA可支持4800等功能的总线协议分析仪测试解决方案。

主要功能介绍还请参考如下及附件相关资料！

1. Introspect DDR5/LPDDR5/LPDDR6 DRAM/MR-DIMM/UDIMM/SO-DIMM/RCD/DB芯片/器件测试验证解决方案：

Component test paradigm----Used to connect to a single DDR5 DRAM, Used to connect to a single RCD or MRCD device, Used to connect to a single LPDRAM

System level test paradigm---Used to connect to an entire RDIMM, MR-DIMM, UDIMM etc. 

PHY Level Testing:

Adjustable voltage and timing parameters on all pins, jitter injection, Change slew rate

• Requires support of different loopback/training modes or uses write and read commands

• Measure horizontal and vertical eye opening at receiver while applying different stressors

• Jitter sensitivity – clock to data skew

• Voltage sensitivity

• Stressed eye

Functional Testing:

Protocol-compliant stimulus for all memory commands, Link training Testing

• Perform pass/fail checks of device behaviour under normal test conditions

• There is a wide variety of tests in this category, that can be roughly categorized as follows

• Functional mode tests – E.g. Training modes, power down, DDR/SDR operation

• Input spec checks – E.g. Mode register writes, MPC commands

• Output spec checks – E.g. QCS operation, output inversion, Qx output delay

Functional Stress Testing: 

What are the limits of the device?  Verify functional behaviourwhile pushing command timings, data rate and other parameters out of spec

Controller Testing (There is no formal JEDEC spec for the memory controller, but Introspect provides much needed characterization capability) : 

• Supports TX testing of command and data bus

• Clock to data skew measurements

• Eye diagrams, BER measurements etc…

• Supports RX testing of data bus using basic pattern features and analog impairment controls. Requires loopback outputs, built-in error counters, or similar test mode in the host controller.

• Advanced capability to act as a memory

BERT measurements on clock and data: 

• Long duration error rate tests

• Eye diagrams

• Jitter measurements

• Slew rate measurements

2. Introspect DDR5/LPDDR5/5X总线协议分析仪+ Interposer测试解决方案

支持8533 datarate下LPDDR5/5X所有数据封包及命令的抓取及协议解析，支持所有的DQ Burst Capture (Data Write/Read), CA可支持4800，等等。