IMX8MM IMX8QXP芯片配置GPIO方向和数据

最新推荐文章于 2024-06-18 11:30:05 发布

王二车

最新推荐文章于 2024-06-18 11:30:05 发布

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分类专栏： NXP/TI 文章标签： IMX8MM GPIO IMX8QXP

本文链接：https://blog.csdn.net/TSZ0000/article/details/108637455

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IMX8MM

复用

查看文档《IMX8MMRM.pdf》第8章节：Chip IO and Pinmux，以设置GPIO1_06为例。

复用具体设置可查看：8.2.5.12 Pad Mux Register (IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO06)

在uboot中设置：mw 0x30330040 0x0，设置为GPIO模式。

方向

查看章节：8.3.3 GPIO Memory Map/Register Definition，重点看GPIO1的DIR方向信息。

设置GPIO为输出：mw 0x30200004 0x40，0x40 = 0b0100 0000 = bit[6] = 1

数据

查看GPIO DR信息，设置高地电平，IMX8MM的IO电源域是1.8V。

设置高电平：mw 0x3020000 0x40，0x40 = 0b0100 0000 = bit[6] = 1

IMX8QXP

不同于imx8mm使用三个寄存器设置，imx8qxp使用一个寄存器设置。

参考手册《IMX8DQXPRM.pdf》Chapter 9 Chip IO，以UART1_CTS_B为例：

复用和输入输出方向设置：

设置GPIO时默认上拉下拉电平：

配置文件pads-imx8qxp.h，与寄存器手册里面描述一致，下面主要是设置复用功能：

#define SC_P_UART1_CTS_B                         80 /* ADMA.UART1.CTS_B, LSIO.PWM3.OUT, ADMA.LCDIF.D17, LSIO.GPT1.COMPARE, LSIO.GPIO0.IO24 */

#define SC_P_UART1_CTS_B_ADMA_UART1_CTS_B                       SC_P_UART1_CTS_B                   0
#define SC_P_UART1_CTS_B_LSIO_PWM3_OUT                          SC_P_UART1_CTS_B                   1
#define SC_P_UART1_CTS_B_ADMA_LCDIF_D17                         SC_P_UART1_CTS_B                   2
#define SC_P_UART1_CTS_B_LSIO_GPT1_COMPARE                      SC_P_UART1_CTS_B                   3
#define SC_P_UART1_CTS_B_LSIO_GPIO0_IO24                        SC_P_UART1_CTS_B                   4

dts配置fsl-imx8x-mek.dtsi，设置为输出且默认拉高，与寄存器手册里面的bit位描述一致：

&iomuxc {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_hog>;

    imx8qxp-mek {
        pinctrl_hog: hoggrp {
            fsl,pins = <
                SC_P_UART1_CTS_B_LSIO_GPIO0_IO24            0x00000020
            >;
        };

在Linux中，接口在/sys/class/gpio/export：

root@genvict_imx8qxp:/sys/class/gpio# ls -l
total 0
--w------- 1 root root 4096 Sep  3 10:18 export
lrwxrwxrwx 1 root root    0 Sep  3 10:19 gpio504 -> ../../devices/platform/5d080000.gpio/gpiochip0/gpio/gpio504
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip224 -> ../../devices/platform/58222000.gpio/gpio/gpiochip224
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip256 -> ../../devices/platform/5d0f0000.gpio/gpio/gpiochip256
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip288 -> ../../devices/platform/5d0e0000.gpio/gpio/gpiochip288
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip320 -> ../../devices/platform/5d0d0000.gpio/gpio/gpiochip320
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip352 -> ../../devices/platform/5d0c0000.gpio/gpio/gpiochip352
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip384 -> ../../devices/platform/5d0b0000.gpio/gpio/gpiochip384
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip416 -> ../../devices/platform/5d0a0000.gpio/gpio/gpiochip416
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip448 -> ../../devices/platform/5d090000.gpio/gpio/gpiochip448
lrwxrwxrwx 1 root root    0 Jul 16 11:10 gpiochip480 -> ../../devices/platform/5d080000.gpio/gpio/gpiochip480
--w------- 1 root root 4096 Jul 16 11:10 unexport

gpio组号需要查询手册或是看dtsi文件：

    gpio0: gpio@5d080000 {
        compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
        reg = <0x0 0x5d080000 0x0 0x10000>;
        interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
        gpio-controller;
        #gpio-cells = <2>;
                power-domains = <&pd_lsio_gpio0>;
        interrupt-controller;
        #interrupt-cells = <2>;
    };

gpio号等于组号加偏移号，如LSIO_GPIO0_IO24就是480+24=504，操作如下：

	echo 504 > /sys/class/gpio/export
	echo out > /sys/class/gpio/gpio504/direction
	ehco 1 > /sys/class/gpio/gpio504/value
	ehco 0 > /sys/class/gpio/gpio504/value