Cache line的解释

转自：http://hi.baidu.com/zengzhaonong/item/f06d81e1da455210585dd88b

The block of memory that is transferred to a memory cache. The cacheline is generally fixed in size, typically ranging from 16 to 256bytes. The effectiveness of the line size depends on the application,and cache circuits may be configurable to a different line size by thesystem designer. There are also numerous algorithms for dynamicallyadjusting line size in real time.

Cache Line 是传送到缓存中的最小内存块。缓存行通常有固定的大小，典型的范围为 16 ~ 256 个字节。行大小的确切值依据具体应用而定，系统设计者可能会对其配置为不同的尺寸。还有一些算法是可以在实时中动态调整缓存行的大小。

The basic unit of storage in a cache is the cache line. A cache line is said to be valid when it contains cached data or instructions, and invalid when it does not. All cache lines in a cache are invalidated on reset. A cache line becomes valid when data or instructions are loaded into it from memory.

Cache(缓存)中最基本的存储单元称为"缓存行"。当一个缓存行中包含有有效的缓存数据或指令时这个缓存行就是有效的，反之是无效的。在重置(reset)时，所有的缓存行都无效。当有数据或指令从内存装载到缓存行中时，这个缓存行有效。