Buildroot_5.10 调试双摄ov13850

1. \EM3568_Buildroot\kernel\arch\arm64\boot\dts\rockchip\rk3568-evb2-lp4x-v10.dtsi
&pinctrl {
   
camera {
   	
		camera_ctl: camera-ctl {
   
			rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
					<2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
					<2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

};
&i2c2{
   
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2m1_xfer>;
	
	ov138501: ov138501@10 {
   
		compatible = "ovti,ov13850";
		status = "okay";
		reg = <0x10>;
		clocks = <&cru CLK_CIF_OUT>;
		clock-names = "xvclk";
		power-domains = <&power RK3568_PD_VI>;
		pinctrl-names = "default";
		pinctrl-0 = <&cif_clk &camera_ctl>;
		rockchip,camera-module-index = <0>;
		rockchip,camera-module-facing = "back";
		rockchip,camera-module-name = "ZC-OV13850R2A-V1"; 
		rockchip,camera-module-lens-name = "Largan-50064B31"; 

		port {
   
			ov138501_out: endpoint {
   
				remote-endpoint = <&dphy1_in>;
				data-lanes = <1>;
			};
		};
	};
};

&i2c4{
   
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c4m0_xfer>;
	
	ov13850: ov13850@10 {
   
		compatible = "ovti,ov13850";
		status = "okay";
		reg = <0x10>;
		clocks = <&cru CLK_CIF_OUT>;
		clock-names = "xvclk";
		power-domains = <&power RK3568_PD_VI>;
		pinctrl-names = "default";
		rockchip,camera-module-index = <1>;
		rockchip,camera-module-facing = "front";
		rockchip,camera-module-name = "ZC-OV13850R2A-V1"; 
		rockchip
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