void I2C_ITConfig(I2C_TypeDef* I2Cx,uint16_t I2C_IT, FunctionalState NewState)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
assert_param(IS_I2C_CONFIG_IT(I2C_IT));
if(NewState != DISABLE)
{
/* Enable the selected I2C interrupts */
I2Cx->CR2 |= I2C_IT;
}
else
{
/* Disable the selected I2C interrupts */
I2Cx->CR2 &= (uint16_t)~I2C_IT;
}
}
void I2C_SendData(I2C_TypeDef* I2Cx,uint8_t Data)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/*Write in the DR register the data to be sent */
I2Cx->DR = Data;
}
uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/*Return the data in the DR register */
return (uint8_t)I2Cx->DR;
}
void I2C_Send7bitAddress(I2C_TypeDef* I2Cx,uint8_t Address, uint8_t I2C_Direction)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_DIRECTION(I2C_Direction));
/*Test on the direction to set/reset the read/write bit */
if(I2C_Direction != I2C_Direction_Transmitter)
{
/* Set the address bit0 for read */
Address |= OAR1_ADD0_Set;
}
else
{
/* Reset the address bit0 for write */
Address &= OAR1_ADD0_Reset;
}
/*Send the address */
I2Cx->DR = Address;
}
uint16_t I2C_ReadRegister(I2C_TypeDef*I2Cx, uint8_t I2C_Register)
{
__IO uint32_t tmp = 0;
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_REGISTER(I2C_Register));
tmp= (uint32_t) I2Cx;
tmp+= I2C_Register;
/*Return the selected register value */
return (*(__IO uint16_t *) tmp);
}
void I2C_SoftwareResetCmd(I2C_TypeDef*I2Cx, FunctionalState NewState)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState != DISABLE)
{
/* Peripheral under reset */
I2Cx->CR1 |= CR1_SWRST_Set;
}
else
{
/* Peripheral not under reset */
I2Cx->CR1 &= CR1_SWRST_Reset;
}
}
void I2C_NACKPositionConfig(I2C_TypeDef*I2Cx, uint16_t I2C_NACKPosition)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_NACK_POSITION(I2C_NACKPosition));
if(I2C_NACKPosition == I2C_NACKPosition_Next)
{
/* Next byte in shift register is the last received byte */
I2Cx->CR1 |= I2C_NACKPosition_Next;
}
else
{
/* Current byte in shift register is the last received byte */
I2Cx->CR1 &= I2C_NACKPosition_Current;
}
}
void I2C_SMBusAlertConfig(I2C_TypeDef*I2Cx, uint16_t I2C_SMBusAlert)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert));
if(I2C_SMBusAlert == I2C_SMBusAlert_Low)
{
/* Drive the SMBusAlert pin Low */
I2Cx->CR1 |= I2C_SMBusAlert_Low;
}
else
{
/* Drive the SMBusAlert pin High */
I2Cx->CR1 &= I2C_SMBusAlert_High;
}
}
void I2C_TransmitPEC(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState != DISABLE)
{
/* Enable the selected I2C PEC transmission */
I2Cx->CR1 |= CR1_PEC_Set;
}
else
{
/* Disable the selected I2C PEC transmission */
I2Cx->CR1 &= CR1_PEC_Reset;
}
}
void I2C_PECPositionConfig(I2C_TypeDef*I2Cx, uint16_t I2C_PECPosition)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition));
if(I2C_PECPosition == I2C_PECPosition_Next)
{
/* Next byte in shift register is PEC */
I2Cx->CR1 |= I2C_PECPosition_Next;
}
else
{
/* Current byte in shift register is PEC */
I2Cx->CR1 &= I2C_PECPosition_Current;
}
}
void I2C_CalculatePEC(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState != DISABLE)
{
/*Enable the selected I2C PEC calculation */
I2Cx->CR1 |= CR1_ENPEC_Set;
}
else
{
/* Disable the selected I2C PEC calculation */
I2Cx->CR1 &= CR1_ENPEC_Reset;
}
}
uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
{
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/*Return the selected I2C PEC value */
return ((I2Cx->SR2) >> 8);
}
void I2C_ARPCmd(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState != DISABLE)
{
/* Enable the selected I2C ARP */
I2Cx->CR1 |= CR1_ENARP_Set;
}
else
{
/* Disable the selected I2C ARP */
I2Cx->CR1 &= CR1_ENARP_Reset;
}
}
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx,FunctionalState NewState)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if(NewState == DISABLE)
{
/* Enable the selected I2C Clock stretching */
I2Cx->CR1 |= CR1_NOSTRETCH_Set;
}
else
{
/* Disable the selected I2C Clock stretching */
I2Cx->CR1 &= CR1_NOSTRETCH_Reset;
}
}
voidI2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle)
{
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle));
if(I2C_DutyCycle != I2C_DutyCycle_16_9)
{
/* I2C fast mode Tlow/Thigh=2 */
I2Cx->CCR &= I2C_DutyCycle_2;
}
else
{
/* I2C fast mode Tlow/Thigh=16/9 */
I2Cx->CCR |= I2C_DutyCycle_16_9;
}
}
ErrorStatus I2C_CheckEvent(I2C_TypeDef*I2Cx, uint32_t I2C_EVENT)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
ErrorStatus status = ERROR;
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_EVENT(I2C_EVENT));
/*Read the I2Cx status register */
flag1 = I2Cx->SR1;
flag2 = I2Cx->SR2;
flag2 = flag2 << 16;
lastevent = (flag1 | flag2) & FLAG_Mask;
if((lastevent & I2C_EVENT) == I2C_EVENT)
{
/* SUCCESS: last event is equal to I2C_EVENT */
status = SUCCESS;
}
else
{
/* ERROR: last event is different from I2C_EVENT */
status = ERROR;
}
return status;
}
uint32_t I2C_GetLastEvent(I2C_TypeDef*I2Cx)
{
uint32_t lastevent = 0;
uint32_t flag1 = 0, flag2 = 0;
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
/*Read the I2Cx status register */
flag1 = I2Cx->SR1;
flag2 = I2Cx->SR2;
flag2 = flag2 << 16;
/*Get the last event value from I2C status register */
lastevent = (flag1 | flag2) & FLAG_Mask;
/*Return status */
return lastevent;
}
FlagStatus I2C_GetFlagStatus(I2C_TypeDef*I2Cx, uint32_t I2C_FLAG)
{
FlagStatus bitstatus = RESET;
__IO uint32_t i2creg = 0, i2cxbase = 0;
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
/*Get the I2Cx peripheral base address */
i2cxbase = (uint32_t)I2Cx;
/*Read flag register index */
i2creg = I2C_FLAG >> 28;
/*Get bit[23:0] of the flag */
I2C_FLAG &= FLAG_Mask;
if(i2creg != 0)
{
/* Get the I2Cx SR1 register address */
i2cxbase += 0x14;
}
else
{
/* Flag in I2Cx SR2 Register */
I2C_FLAG = (uint32_t)(I2C_FLAG >> 16);
/* Get the I2Cx SR2 register address */
i2cxbase += 0x18;
}
if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET)
{
/* I2C_FLAG is set */
bitstatus = SET;
}
else
{
/* I2C_FLAG is reset */
bitstatus = RESET;
}
/*Return the I2C_FLAG status */
return bitstatus;
}
void I2C_ClearFlag(I2C_TypeDef* I2Cx,uint32_t I2C_FLAG)
{
uint32_t flagpos = 0;
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
/*Get the I2C flag position */
flagpos = I2C_FLAG & FLAG_Mask;
/*Clear the selected I2C flag */
I2Cx->SR1 = (uint16_t)~flagpos;
}
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx,uint32_t I2C_IT)
{
ITStatus bitstatus = RESET;
uint32_t enablestatus = 0;
/*Check the parameters */
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_I2C_GET_IT(I2C_IT));
/*Check if the interrupt source is enabled or not */
enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) &(I2Cx->CR2)) ;
/*Get bit[23:0] of the flag */
I2C_IT &= FLAG_Mask;
/*Check the status of the specified I2C flag */
if(((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus)
{
/* I2C_IT is set */
bitstatus = SET;
}
else
{
/* I2C_IT is reset */
bitstatus = RESET;
}
/*Return the I2C_IT status */
return bitstatus;
}