目录
在zynq和mv88e6390的port0之间采用了mac to mac的连接方式,而且zynq的mdio端口直接连接到了mv88e6390,故在uboot启动中,可通过mii和mdio命令对mv88e6390直接操作。
1、需要给内核打补丁:
patch -p1 < ../Xilinx_Answer_69132_Files_v2018_3_AR69132_Patch/0001-net-macb-Add-MDIO-driver-for-accessing-multiple-PHY-.patch
2、通过内核选择mv88e6390相关驱动:
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88e6XXX=y
CONFIG_NET_DSA_MV88e6XXX_GLOBAL2=y
3、配置设备树
根据实际情况,mv88e6390的port1端口通过mac对mac方式连接到zynq,模式为rgmii,port4端口外接其它设备。
1)zynq的数据传输默认采用边沿触发,而mv88e6390默认采用中心触发,在设备树通过定义phy-mode="rgmii-id";实现。rgmii-id的定义详见内核include/linux/phy.h中函数phy_modes();
2)由于外部没有phy设备,不能自协商,需要设置成固定速率,所以在设备树中通过fixed-link设置,固定速率1000Mb/s,全双工。
fixed-link {
speed = <1000>;
full-duplex;
};
3)通过tcpdump发现,板子可以接收PC机通过port4发过来的数据,但向PC发送数据时,PC机接收不到数据,加入
tx_delay=<0x2f>;
rx_delay=<0x24>;
后,数据收发正常。最后设备树如下所示。
/include/ "system-conf.dtsi"
/ {
compatible = "xlnx,zynq-7000";
mdio1: mdio {
compatible = "cdns,macb-mdio";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0xe000b000 0x1000>;
status = "okay";
clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
clock-names = "pclk", "hclk", "tx_clk";
};
};
&gem0 {
status = "okay";
phy-handle = <&switch0cpu0>;
phy-mode = "rgmii-id";
tx_delay=<0x2f>;
rx_delay=<0x24>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mdio1 {
switch: switch@0 {
compatible = "marvell,mv88e6190";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0x0>;
status = "okay";
dsa,member = <0x0 0x0>;
ports {
#address-cells = <0x1>;
#size-cells = <0x0>;
switch0cpu0: port@1 {
reg = <0x1>;
label = "cpu";
ethernet = <&gem0>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@4 {
status = "okay";
reg = <0x4>;
label = "eth4";
phy-mode = "1000base-x";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};