并口Parport学习笔记

创建时间：2010-03-21
作者：Steven Yang
E-mail：mqyoung@gmail.com

 

并口在计算机应用及系统测试中具有重要的作用，现详细说明并口相关技术如下。

 

1 并口规范

The following tables list the details of how the software interfaces to hardware port. Refer to the source code itself for more information, or check out one of the links at the end of this page.

Printer Port Addresses
Printer Port	Base Address
LPT1	0x0378 or 0x03BC
LPT2	0x0278 or 0x0378
LPT3	0x0278

Printer Port Registers
Register Name	Address
Data Register	Base + 0x00
Status Register	Base + 0x01
Control Register	Base + 0x02

Data Register Bit Definitions
Bit	Function	Low	High
7 (MSB)	D7	0	1
6	D6	0	1
5	D5	0	1
4	D4	0	1
3	D3	0	1
2	D2	0	1
1	D1	0	1
0 (LSB)	D0	0	1

Status Register Bit Definitions
Bit	Function	Low	High
7 (MSB)	Busy	Busy	Not Busy
6	Acknowledge	Nack	Ack
5	Paper Status	No Paper	Paper
4	Selection Status	Not Selected	Selected
3	Error Status	No Error	Error
2	Not Used	-	-
1	Not Used	-	-
0 (LSB)	Not Used	-	-

Control Register Bit Definitions
Bit	Function	Low	High
7 (MSB)	Not Used	-	-
6	Not Used	-	-
5	Not Used	-	-
4	Interrupt Control	Interrupts Disabled	Interrupts Enabled
3	Select	Selected	Not Selected
2	Initialize	False	True
1	Auto Feed	True	False
0 (LSB)	Strobe (Active-Low)	True	False

 

 

2 并口引脚

The bit specifications are outlined in Figure 9-1. You can access 12 output bits and 5
input bits, some of which are logically inverted over the course of their signal path.
The only bit with no associated signal pin is bit 4 (0x10) of port 2, which enables
interrupts from the parallel port.

 

The parallel interface, in its minimal configuration (we overlook the ECP and EPP
modes) is made up of three 8-bit ports. The PC standard starts the I/O ports for the
first parallel interface at 0x378 and for the second at 0x278. The first port is a bidirec-
tional data register; it connects directly to pins 2–9 on the physical connector. The
second port is a read-only status register; when the parallel port is being used for a
printer, this register reports several aspects of printer status, such as being online,
out of paper, or busy. The third port is an output-only control register, which,
among other things, controls whether interrupts are enabled.

 

 

 

 

 

参考：

1 并口规范 http://ee.cleversoul.com/parallel_port.html

2 并口程序 http://ee.cleversoul.com/parallel_port_source.html

3 <Linux Device Driver 3th Edition>

4 http://ckp.made-it.com/ieee1284.html