Intel® 64 and IA-32 Architectures Software Developer's Manuals

 

Intel® 64 and IA-32 Architectures Software Developer's Manuals

These manuals describe the architecture and programming environment of the Intel® 64 and IA-32 processors. Electronic versions of these documents allow you to quickly get to the information you need and print only the pages you want. At present, downloadable PDFs of Volumes 1 through 5 are at version 034. The downloadable PDF of the Intel® 64 and IA-32 Architectures Optimization Reference Manual is at version 020.

For a full set of manuals on CD-ROM* click here to order**.

The resource CD-ROM contains the following manuals:

  • Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture
  • Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2A: Instruction Set Reference, A-M
  • Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 2B: Instruction Set Reference, N-Z
  • Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide Part 1
  • Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide Part 2
  • Intel® 64 Architecture x2APIC Specification
  • Intel® 64 and IA-32 Architectures Application Note TLBs, Paging-Structure Caches, and Their Invalidation
  • Intel® 64 and IA-32 Architectures Optimization Reference Manual

*Note: The Intel® 64 and IA-32 Architectures Software Developer抯 Manuals are no longer available to order as hard copy.
**Note: This link will direct you to the Intel WW Fulfillment Center.

Intel® 64 Architecture x2APIC Specification

This document describes the x2APIC architecture which is extended from the xAPIC architecture. Extensions to the xAPIC architecture are intended primarily to increase processor addressability. The x2APIC architecture provides backward compatibility to the xAPIC architecture and forward extendability for future Intel platform innovations.

Intel® 64 and IA-32 Architectures Application Note
TLBs, Paging-Structure Caches, and Their Invalidation

The information contained in this application note is now part of Intel® 64 and IA-32 Architectures Software Developer's Manual Volumes 3A and 3B.

Intel® 64 and IA-32 Architectures Software Developer's Manual
Documentation Changes

Describes bug fixes made to the Intel® 64 and IA-32 Architectures Software Developer's Manual between versions.

Intel® 64 and IA-32 Architectures Software Developer's Manual
Volume 1: Basic Architecture

Describes the architecture and programming environment of processors supporting IA-32 and Intel® 64 Architectures.

Intel® 64 and IA-32 Architectures Software Developer's Manual
Volume 2A: Instruction Set Reference, A-M

Describes the format of the instruction and provides reference pages for instructions (from A to M). This volume also contains the table of contents for both Volumes 2A and 2B.

Intel® 64 and IA-32 Architectures Software Developer's Manual
Volume 2B: Instruction Set Reference, N-Z

Provides reference pages for instructions (from N to Z). VMX instructions are treated in a separate chapter. This volume also contains the appendices and index support for Volumes 2A and 2B.

Intel® 64 and IA-32 Architectures Software Developer's Manual
Volume 3A: System Programming Guide

Describes the operating-system support environment of an IA-32 and Intel® 64 architectures, including: memory management, protection, task management, interrupt and exception handling, multi-processor support, and thermal and power management features. This volume also contains the table of contents for both Volumes 3A and 3B.

Intel® 64 and IA-32 Architectures Software Developer's Manual
Volume 3B: System Programming Guide

Continues the coverage on system programming subjects begun in Volume 3A. Volume 3B covers debugging, performance monitoring, system management mode, and Intel® Virtualization Technology (Intel® VT). This volume also contains the appendices and indexing support for Volumes 3A and 3B.

Intel® 64 and IA-32 Architectures Optimization Reference Manual

Intel® 64 and IA-32 Architectures Optimization Reference Manual provides information on Intel® Core™ processors, Intel NetBurst® microarchitecture and other recent Intel® microarchitectures. It describes code optimization techniques to enable you to tune your application for highly optimized results when run on Intel® Atom™, Intel® Core™ i7, Intel® Core™, Intel® Core™2 Duo, Intel® Core™ Duo, Intel® Xeon®, Intel® Pentium® 4, and Intel® Pentium® M processors.

Intel® 64 Architecture Memory Ordering White Paper

This document has been merged into Volume 3A of Intel 64 and IA-32 Architectures Software Developer抯 Manual.

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