ARM Core WFI/WFE

---- Power modes

The power domains can be controlled independently to give different combinations of powered-up and powered-down domains. (Power domain 的控制是独立的，可以有不同的上下电结合)

However, only some combinations are valid and supported.(只有一些结合是支持并有效的)The following table describes the supported power domain states for individual cores. The power domain state in each core is independent of all other cores.

Power Domains
PDCPU	PDADVSIMD
Off	Off	Core off
On	On	Core on。 Advanced SIMD and floating-point block on.
On	Ret	Core on. Advanced SIMD and floating-point block in retention.
Ret	Ret	Core retention。 Core logic and Advanced SIMD and floating-point block in retention.

1、Run mode

Run mode is the normal mode of operation in which all of the functionality of the processor is available. In run mode, a core in the processor is powered on and executing.

2、Standby mode

When a core is in standby mode, it is architecturally clock gated at the top of the clock tree. The clock is then cut from all registers in the core. This mode is also known as WFI(wait for interrupt) or WFE(wait for event). 

---- Core内寄存器的clock被关掉。

Each individual core in the cluster can be put into standby mode separately from the other cores.

---- Core Wait for Interrupt (WFI)

WFI is a feature of the ARMv8-A architecture that puts the core in a low-power state by disabling most of the clocks in the core while keeping the core powered up. 

通过关掉core的大部分clock，让core进入low-power状态，但是core不掉电。

Apart from a small dynamic power overhead on the logic to enable the core to wake up from WFI low-power state, this reduces the power drawn to static leakage current only. 

(小部分的动态功耗在逻辑电路上，可以将core从low power状态唤醒，减少静态漏电电流)

Software indicates that the core can enter the WFI low-power state by executing the WFI instruction. When the core is executing the WFI instruction, the core waits for all instructions in the core to retire before entering the idle or low-power state. (在进入idle或low-power状态之前，执行完core内的所有指令)

The WFI instruction ensures that all explicit memory accesses that occurred before the WFI instruction in program order have retired. In addition, the WFI instruction ensures that store (store from a register into memory ) instructions have updated the cache or have been issued to the L3 memory system.

While the core is in WFI low-power state, the clocks in the core are temporarily enabled without causing

the core to exit WFI low-power state when any of the following events are detected:

临时的enable core的clock不会引起core从WFI状态退出，当检测到以下任何一个事件时：

1)   An L3 snoop (探听) request that must be serviced by the core data caches.

2)   A cache or TLB maintenance operation that must be serviced by the core L1 instruction cache, data cache,TLB, or L2 cache.

3)   An APB access to the debug or trace registers residing in the core power domain. Exit from WFI low-power state occurs when the core detects a reset or one of the WFI wake up events.

---- Core wait for event (WFE)

WFE is a feature of the ARMv8-A architecture that uses a locking mechanism (一种锁机制) based on events to

put the core in a low-power state by disabling most of the clocks in the core while keeping the core powered up.

Apart from a small dynamic power overhead (小部分的动态功耗在逻辑电路上，可以将core从low power状态唤醒) 

on the logic to enable the core to wake up from WFE low-power state, this reduces the power drawn to static

leakage current only. (减少静态漏电电流)

---------同上

Exit from WFE low-power state occurs when the core detects a reset, the assertion of the EVENT1input signal, 

or one of the WFE wake-up events.

3、Shutdown mode (断电)

Ananke supports a full shutdown mode, where power can be removed completely, and no state is retained.

The shutdown can be for either the whole cluster or just for an individual core, (可以整个cluster掉电，也可以是

单个core掉电) which allows other cores in the cluster to continue operating.

To avoid losing data, the cores within the cluster and the cluster itself must be taken out of coherence.