Define SSE2, SSE3 and SSE4

http://www.intel.com/content/www/us/en/support/processors/000005779.html

Intel streaming SIMD extensions

SSE is short for Streaming SIMD Extensions
SIMD is short for Single Instruction Multiple Data

SSE is a processor technology that enables single instruction multiple data. On older processors only a single data element could be processed per instruction. SSE enables the instruction to handle multiple data elements. It is used in intensive applications such as 3D graphics making processing much faster. SSE was designed to replace MMX™ Technology. SSE was subsequently expanded over the generations of Intel® Processors to include SSE2, SSE3/SSE3S and SSE4. Each iteration brought new instructions and increased performance.

Streaming SIMD Extensions 2 (SSE2) extends the MMX™ Technology and SSE technology with the addition of 144 instructions that deliver performance increases across a broad range of applications. The SIMD integer instructions introduced with MMX technology have been extended from 64 to 128 bits, doubling the effective execution rate of SIMD integer type operations.

Double-precision floating point SIMD instructions allow for two floating-point operations to be simultaneously executed in the SIMD format, providing support for double-precision operations that help accelerate content creation, financial, engineering, and scientific applications.

In addition to the SSE2 instructions, the original SSE instructions have been enhanced to support a flexible and higher dynamic range of computational power by supporting arithmetic operations on multiple data types (e.g., double words and quad words). SSE2 instructions allow software developers to have maximum flexibility to implement algorithms and provide performance enhancements when running software such as MPEG-2, MP3, 3D graphics, etc.

The launch of 90 nm process-based Pentium 4 processor introduces the Streaming SIMD Extensions 3 (SSE3), which includes 13 additional SIMD instructions over SSE2. The 13 new instructions in SSE3 are primarily designed to improve thread synchronization and specific application areas such as media and gaming.

Intel SSE4 consists of 54 instructions. A subset consisting of 47 instructions, referred to as SSE4.1 in Intel documentation, is available in Penryn. Additionally, SSE4.2, a second subset consisting of the 7 remaining instructions, is first available in the Nehalem-based Intel® Core™ i7 Processor. Intel credits feedback from developers as playing an important role in the development of the instruction set.