理解MIPS指令集中的ll (load linked) 和 sc (store conditional)指令

关于MIPS指令集的ll(load linked)和sc(store conditional)指令，课本上的叙述实在不好理解（于我）
所以找了一个比较好理解的版本记录下来。

Q:What is ll and sc in mips?
A:Load linked (LL) and store conditional (SC) instructions are a way to achieve atomic memory >updates in shared memory multiprocessor systems, without locking memory locations for >exclusive access by one processor.

The idea is that you use LL to load the value stored at a memory location into a register, modify >it however you like there, and subsequently write it back to the same place using SC. SC will only >overwrite the value in memory with your modified one if no other processor has altered it while >you were working on the copy in the register. It has the side-effect of setting a status flag to >indicate whether or not it was successful.

When the updated value is successfully stored, a thread can trust that its read-modify-write >sequence was completed without interference from other threads. On a failure, it is up to the >program to decide whether to give up or reload the address and try again, but at least it doesn’t >produce an undetected Race condition.

英文部分转自这里

拙劣的翻译：
ll和sc指令是一种在多处理器系统中实现共享内存的原子操作的方法，且不需要为了让一个处理器独占它而锁定它。

意思是，你用ll指令读取一个内存中的数据并存到一个寄存器，然后在寄存器修改（或不）这个值，随后用sc指令将它写入到同样的（原来的）位置。而sc指令只在你修改寄存器中的值的期间，没有任何一个处理器改变它内存中的值 这种情况下，将值写入。它同时需要（的副作用是）设置一个指示状态的变量来表明是否成功写入。（成功为1，失败为0）

当新的值成功地被写入了，那么可以认为这个线程在没有别的线程干涉的情况下完成了（一个值的）读-改-写过程。如果失败了，接下来就取决于程序是要放弃这个操作还是再试一次了，不过至少它（ll&sc）不会生成一个隐性的（不被察觉的）竞争危害。