sprd sleep log

<6>request_suspend_state: sleep (0->3) at 96223012521 (2012-01-01 00:50:34.369585834 UTC)
<6>early_suspend: call handlers
<6>early_suspend: calling sprd_cpufreq_earlysuspend
--xing--- sprd_cpufreq_earlysuspend do nothing
sprd-gsensor: -- lis3dh_acc_disable --
-------- suspend sprd_cpufreq_earlysuspend
<6>early_suspend: calling sprd_backlight_earlysuspend
-------- suspend sprd_backlight_earlysuspend
<6>early_suspend: calling sprd_kpled_early_suspend
<6>emc_freq: __emc_clk_set flag =  0x00180111 ,- 4 = 0x11223368 phy register = 0x00040000
<6>emc_freq: __emc_clk_set clk = 384 real_clk = 384 REG_AON_APB_DPLL_CFG = 1210032, PUBL_DLLGCR = 40000
sys timer = 0x0002ee61, ap sys count = 0x0002eed1
<6>emc_freq: __emc_clk_set flag =  0x000c8110 ,- 4 = 0x11223368 phy register = 0x00060000
<6>emc_freq: __emc_clk_set clk = 200 real_clk = 200 REG_AON_APB_DPLL_CFG = 1210032, PUBL_DLLGCR = 60000
sys timer = 0x0002ee81, ap sys count = 0x0002eef0
<6>[SPRD_KPLED_INFO] sprd_kpled_early_suspend
-------- suspend sprd_kpled_early_suspend
<6>early_suspend: calling ft5x0x_ts_suspend
<6>==ft5x0x_ts_suspend==
<3>[FT53X6_ERR] func: ft5x0x_ts_suspend  line: 0594  info: trying to enter hibernate again. ret = 0
<3>[FT53X6_ERR] func: ft5x0x_ts_suspend  line: 0594  info: trying to enter hibernate again. ret = 0
<3>i2c i2c-1: sprd_i2c_handle_msg() rc=-1
<3>: ======dump i2c-1 reg=======
<3>: I2C_CTRL:0x5a
<3>: I2C_CMD:0x7041
<3>: I2C_DVD0:0xf
<3>: I2C_DVD1:0x0
<3>: I2C_RST:0x0
<3>: I2C_CMD_BUF:0x0
<3>: I2C_CMD_BUF_CTL:0x0
<3>: 26M clock status:1
<3>: BASE_CLK_SEL i2c[0~5],: 0x0, 0x0, 0x0, 0x0, 0x0, 0x0
<3>: BASE ENABLE I2C[0~5],: 1, 1, 1, 1, 0, 1
<3>: BASE RESET I2C[0~5],: 0, 0, 0, 0, 0, 0
<3>ft5x0x_i2c_txdata i2c write error: -5
<3>write reg failed! 0xa5 ret: -5<6>$$$ sprd_real_set_cpufreq 1200000 khz on cpu0
-------- suspend ft5x0x_ts_suspend
<6>early_suspend: calling stop_drawing_early_suspend
-------- suspend stop_drawing_early_suspend
<6>early_suspend: calling sprdfb_early_suspend
sprdfb: [sprdfb_early_suspend]
<6>sprdfb:[sprdfb_dispc_suspend], dev->enable = 1
sprdfb: [sprdfb_panel_suspend], dev_id = 0
<6>sprdfb: [sprdfb_mipi_panel_suspend], dev_id = 0
<6>sprdfb: [sprdfb_dsi_uninit], dev_id = 0
<6>$$$ sprd_real_set_cpufreq 1000000 khz on cpu0
-------- suspend sprdfb_early_suspend
<6>early_suspend: calling ltr558_early_suspend
-------- suspend ltr558_early_suspend
<6>early_suspend: calling devfreq_early_suspend
-------- suspend devfreq_early_suspend
<6>early_suspend: sync
<6>PM: Syncing filesystems...
<6>PM: suspend entry 2012-01-01 00:50:35.252586346 UTC
PM:  before pm_prepare_consol ...
PM:  before pm_notifier_call_chain  ...
---xing--- dvfs get suspend notify
<6>----@@@---- ok do nonthing
<6>$$$ sprd_real_set_cpufreq 1200000 khz on cpu0
Mali<2>: mali_pwr_suspend_notifier(PM_SUSPEND_PREPARE) called
Mali<2>: Mali PM: OS suspending...
Mali<2>: Mali PM: Setting GPU power mode to MALI_POWER_MODE_DEEP_SLEEP
Mali<2>: Mali PM: OS suspend completed
Freezing user space processes ... <4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
<4>sbuf_read wait interrupted!
(elapsed 0.06 seconds) done.
<6>PM: sync done.
<6>PM: Syncing filesystems...
<6>PM: sync done.
<4>sbuf_read wait timeout!
Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
<6>[SPRD_KPLED_WARN] Do NOT change brightness in suspend mode
dwc_otg_bus_suspend
++++++rtc set alarm and delay is 0 !++++++
sprd-gsensor: -- lis3dh_acc_suspend -- !
sprd-gsensor: -- lis3dh_acc_disable --
<6>[FT53X6_INFO] ft5x0x_suspend
<3>i2c i2c-1: sprd_i2c_handle_msg() rc=-1
<3>: ======dump i2c-1 reg=======
<3>: I2C_CTRL:0x5a
<3>: I2C_CMD:0x7041
<3>: I2C_DVD0:0xf
<3>: I2C_DVD1:0x0
<3>: I2C_RST:0x0
<3>: I2C_CMD_BUF:0x0
<3>: I2C_CMD_BUF_CTL:0x0
<3>: 26M clock status:1
<3>: BASE_CLK_SEL i2c[0~5],: 0x0, 0x0, 0x0, 0x0, 0x0, 0x0
<3>: BASE ENABLE I2C[0~5],: 1, 1, 1, 1, 0, 1
<3>: BASE RESET I2C[0~5],: 0, 0, 0, 0, 0, 0
<3>ft5x0x_i2c_txdata i2c write error: -5
<3>write reg failed! 0xa5 ret: -5<6>[FT53X6_INFO] CTP is in hibernate mode. ret = -1
<6>[SPRD_HEADSET_INFO][3] plug_state_last = 0,  plug_state_class_g_on = 0
<6>[SPRD_HEADSET_INFO][3] suspend (det_irq=477    but_irq=475)
gsp_suspend2510
mmc2, mmc_suspend_host, disable work  idle
mmc2,sdhci_pm_suspend end<3>setting trigger mode 0 for irq 239 failed (sci_gpio_irq_set_type+0x0/0x1e8)
mmc1, mmc_suspend_host, disable work  idle
mmc1,sdhci_pm_suspend endmmc0, mmc_suspend_host, disable work  idle
mmc0,sdhci_pm_suspend end<6>dwc_otg_suspend
<6>PM: suspend of devices complete after 181.841 msecs
<6>PM: late suspend of devices complete after 0.375 msecs
<6>PM: noirq suspend of devices complete after 0.717 msecs
Disabling non-boot CPUs ...
cpu0, enter sprd_pm_deepsleep
REG_PIN_XTLEN   0x00002144
REG_PIN_XTL_BUF_EN0   0x0001e101
REG_PIN_XTL_BUF_EN1   0x0001e101
REG_PIN_XTL_BUF_EN2   0x0001e101
REG_PIN_CHIP_SLEEP    0x00002100
### uart1 ckd 0x000000e2
### uart1 ctl 0x0000001c
REG_PMU_APB_XTL0_REL_CFG 0x0000000f
REG_PMU_APB_XTL1_REL_CFG 0x0000000f
REG_PMU_APB_XTL2_REL_CFG 0x0000000f
REG_PMU_APB_XTLBUF0_REL_CFG 0x0000000f
REG_PMU_APB_XTLBUF1_REL_CFG 0x0000000f
REG_PMU_APB_PD_CP1_TD_CFG 0x00080204
ca7_dap_eb not 0
REG_PMU_APB_SLEEP_STATUSvalue 0x5
aon pmu status reg
REG_PMU_APB_PD_PUB_SYS_CFG ------ 0x01080006
REG_PMU_APB_CP_SLP_STATUS_DBG0 ----- 0xcbefafef
REG_PMU_APB_CP_SLP_STATUS_DBG1 ----- 0x0000000f
REG_PMU_APB_PWR_STATUS0_DBG ----- 0x77077700
REG_PMU_APB_PWR_STATUS1_DBG ----- 0x07777770
REG_PMU_APB_PWR_STATUS2_DBG ----- 0x07700007
REG_PMU_APB_PWR_STATUS3_DBG ----- 0x00000000
REG_PMU_APB_SLEEP_CTRL ----- 0x0000000e
REG_PMU_APB_DDR_SLEEP_CTRL ----- 0x00000070
REG_PMU_APB_SLEEP_STATUS ----- 0x00000005
aon apb reg
REG_AON_APB_APB_EB0  ----- 0xf5f1c708
REG_AON_APB_APB_EB1  ----- 0x00000133
REG_AON_APB_PWR_CTRL ----- 0x00000007
ap ahb reg
REG_AP_AHB_AHB_EB ----- 0x0001e000
ap apb reg
REG_AP_APB_APB_EB ---- 0x007ce000
REG_AP_AHB_MCU_PAUSE ---   0x00000014
REG_AP_AHB_AP_SYS_FORCE_SLEEP_CFG --- 0x00000002
REG_AP_AHB_AP_SYS_AUTO_SLEEP_CFG ---- 0x0000013b
REG_AP_AHB_CA7_STANDBY_STATUS ---- 0x00000fee
ana reg
ANA_REG_GLB_LDO_SLP_CTRL0 --- 0x0000a22c
ANA_REG_GLB_LDO_SLP_CTRL1 --- 0x00001ff1
ANA_REG_GLB_LDO_SLP_CTRL2 --- 0x00000000
ANA_REG_GLB_LDO_SLP_CTRL3 --- 0x00000000
ANA_REG_GLB_AUD_SLP_CTRL4 --- 0x00000000
ANA_REG_GLB_XTL_WAIT_CTRL --- 0x00000132
ANA_REG_GLB_PWR_XTL_EN0 -- 0x00008007
ANA_REG_GLB_PWR_XTL_EN1 -- 0x000001c7
ANA_REG_GLB_PWR_XTL_EN2 -- 0x00000000
ANA_REG_GLB_PWR_XTL_EN3 -- 0x000001c0
ANA_REG_GLB_PWR_XTL_EN4 -- 0x000001ff
ANA_REG_GLB_PWR_XTL_EN5 -- 0x00000000
mm reg
REG_MM_AHB_AHB_EB ---- 0x00000000
ana reg
ANA_REG_GLB_LDO_PD_CTRL --- 0x00000ffe
ANA_REG_GLB_ARM_MODULE_EN --- 0x000017ce
APB_EB 0x007ce000
INTC0 mask:0x00000000 raw:0x00000000 en:0x00100008
INTC1 mask:0x00000000 raw:0x00000000 en:0x008f4c90
INTC2 mask:0x00000000 raw:0xe0000000 en:0x00300120
INTC3 mask:0x00000000 raw:0x0000003c en:0x00000000
INT mask:0x00000000 raw:0x00000000 en:0x000057f4
ANA INT mask:0x00000000 raw:0x00000000 en:0x000007ff
ANA EIC MODULE_EN 0x000017ce eic bit(3)
ANA EIC int en 0x00000025
ANA EIC int status 0x00000000, 0x000000ff
PWR_STATUS0_DBG 0x77077700
PWR_STATUS1_DBG 0x07777770
PWR_STATUS2_DBG 0x07700007
PWR_STATUS3_DBG 0x00000000
















[SLEEP_GPIO_CHECK]gpio-0   (GSENSOR_INT1        ) in  hi
[SLEEP_GPIO_CHECK]gpio-1   (GSENSOR_INT2        ) in  hi
[SLEEP_GPIO_CHECK]gpio-71  (sdio0_detect        ) in  hi
[SLEEP_GPIO_CHECK]gpio-72  (USB OTG CABLE       ) in  hi
[SLEEP_GPIO_CHECK]gpio-81  (ts_rst_pin          ) out hi
[SLEEP_GPIO_CHECK]gpio-82  (ts_irq_pin          ) in  hi
[SLEEP_GPIO_CHECK]gpio-162 (ltr558_irq_pin      ) in  hi
[SLEEP_GPIO_CHECK]gpio-167 (sysfs               ) out hi
[SLEEP_GPIO_CHECK]gpio-168 (sysfs               ) out lo
[SLEEP_GPIO_CHECK]gpio-186 (ccirrst             ) in  hi
[SLEEP_GPIO_CHECK]gpio-187 (main camera         ) in  hi
[SLEEP_GPIO_CHECK]gpio-188 (sub camera          ) in  lo
[SLEEP_GPIO_CHECK]gpio-231 (bt_power            ) out lo
[SLEEP_GPIO_CHECK]gpio-232 (bt_host_wake        ) in  lo
[SLEEP_GPIO_CHECK]gpio-233 (bt_reset            ) out lo
[SLEEP_GPIO_CHECK]gpio-235 (bt_ext_wake         ) out lo
[SLEEP_GPIO_CHECK]gpio-237 (headset_switch      ) out lo
[SLEEP_GPIO_CHECK]gpio-304 (sprd_ogt            ) in  lo
[SLEEP_GPIO_CHECK]gpio-306 (powerkey            ) in  lo
[SLEEP_GPIO_CHECK]gpio-307 (headset_button      ) in  lo
[SLEEP_GPIO_CHECK]gpio-308 (chg_cv_state        ) in  lo
[SLEEP_GPIO_CHECK]gpio-309 (headset_detect      ) in  lo
[SLEEP_GPIO_CHECK]gpio-310 (vchg_ovi            ) in  lo
<6>__iomap_page (1) pgd c0007d4c, pte ddcdbd00, *pte 60d00050
<6>__iomap_page (1) pgd c0007d4c, pte ddcdbd40, *pte 60e00050
<6>__iomap_page (1) pgd c0007d48, pte ddcdbbc0, *pte 60800050
<6>__iomap_page (1) pgd c0007d4c, pte ddcdbc00, *pte 60900050
[SLEEP_CLK_CHECK]clock[clk_avs1] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_avs0] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_i2c] is active, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_mspi] is active, usage 0, rate 52000000, parent[clk_52m]
[SLEEP_CLK_CHECK]clock[clk_ts] is active, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_dap] is active, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_efuse] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_pwm3] is inactive, usage 0, rate 32768, parent[ext_32k]
[SLEEP_CLK_CHECK]clock[clk_pwm2] is inactive, usage 0, rate 32768, parent[ext_32k]
[SLEEP_CLK_CHECK]clock[clk_pwm1] is inactive, usage 0, rate 32768, parent[ext_32k]
[SLEEP_CLK_CHECK]clock[clk_pwm0] is inactive, usage 0, rate 32768, parent[ext_32k]
[SLEEP_CLK_CHECK]clock[clk_aux2] is active, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_aux1] is inactive, usage 0, rate 32768, parent[ext_32k]
[SLEEP_CLK_CHECK]clock[clk_aux0] is inactive, usage 0, rate 32768, parent[ext_32k]
[SLEEP_CLK_CHECK]clock[clk_adi] is active, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_fm] is inactive, usage 0, rate 64000000, parent[clk_fm_in]
[SLEEP_CLK_CHECK]clock[clk_fm_in] is inactive, usage 0, rate 64000000, parent[none]
[SLEEP_CLK_CHECK]clock[clk_vbc] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_audif] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_aud] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_dcam_mipi] is inactive, usage 0, rate 153600000, parent[clk_csi_ckg_i]
[SLEEP_CLK_CHECK]clock[clk_cphy_cfg_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_csi_ckg_i] is inactive, usage 0, rate 153600000, parent[clk_csi_i]
[SLEEP_CLK_CHECK]clock[clk_csi_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_dcam] is inactive, usage 0, rate 76800000, parent[clk_76m8]
[SLEEP_CLK_CHECK]clock[clk_dcam_ckg_i] is inactive, usage 0, rate 153600000, parent[clk_dcam_i]
[SLEEP_CLK_CHECK]clock[clk_dcam_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_ccir] is inactive, usage 0, rate 24000000, parent[clk_24m]
[SLEEP_CLK_CHECK]clock[clk_ccir_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_ccir_in] is active, usage 0, rate 64000000, parent[none]
[SLEEP_CLK_CHECK]clock[clk_sensor] is inactive, usage 0, rate 48000000, parent[clk_48m]
[SLEEP_CLK_CHECK]clock[clk_sensor_ckg_i] is inactive, usage 0, rate 153600000, parent[clk_sensor_i]
[SLEEP_CLK_CHECK]clock[clk_sensor_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_isp] is inactive, usage 0, rate 76800000, parent[clk_76m8]
[SLEEP_CLK_CHECK]clock[clk_isp_ckg_i] is inactive, usage 0, rate 153600000, parent[clk_isp_i]
[SLEEP_CLK_CHECK]clock[clk_isp_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_vsp] is inactive, usage 0, rate 256000000, parent[clk_256m]
[SLEEP_CLK_CHECK]clock[clk_vsp_ckg_i] is inactive, usage 0, rate 153600000, parent[clk_vsp_i]
[SLEEP_CLK_CHECK]clock[clk_vsp_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_jpg] is inactive, usage 0, rate 256000000, parent[clk_256m]
[SLEEP_CLK_CHECK]clock[clk_jpg_ckg_i] is inactive, usage 0, rate 153600000, parent[clk_jpg_i]
[SLEEP_CLK_CHECK]clock[clk_jpg_i] is inactive, usage 0, rate 153600000, parent[clk_mm_ahb]
[SLEEP_CLK_CHECK]clock[clk_mm_ckg_i] is active, usage 0, rate 128000000, parent[clk_mm_i]
[SLEEP_CLK_CHECK]clock[clk_mm_axi] is active, usage 0, rate 128000000, parent[clk_mm_mtx_axi]
[SLEEP_CLK_CHECK]clock[clk_mm_mtx_axi] is active, usage 0, rate 128000000, parent[clk_mm_i]
[SLEEP_CLK_CHECK]clock[clk_mm_ahb] is active, usage 0, rate 153600000, parent[clk_153m6]
[SLEEP_CLK_CHECK]clock[clk_mm_i] is active, usage 1, rate 128000000, parent[clk_mm_top_i]
[SLEEP_CLK_CHECK]clock[clk_mm_top_i] is active, usage 2, rate 128000000, parent[clk_aon_apb]
[SLEEP_CLK_CHECK]clock[clk_iis3] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_iis2] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_iis1] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_iis0] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_spi2] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_spi1] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_spi0] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_i2c4] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_i2c3] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_i2c2] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_i2c1] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_i2c0] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_uart4] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_uart3] is inactive, usage 0, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_uart2] is inactive, usage 1, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_uart1] is active, usage 1, rate 26000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_uart0] is active, usage 1, rate 48000000, parent[clk_48m]
[SLEEP_CLK_CHECK]clock[clk_usb_ref] is inactive, usage 0, rate 12000000, parent[clk_12m]
[SLEEP_CLK_CHECK]clock[clk_gps] is inactive, usage 0, rate 64000000, parent[clk_64m]
[SLEEP_CLK_CHECK]clock[clk_gps_tcxo] is inactive, usage 0, rate 64000000, parent[none]
[SLEEP_CLK_CHECK]clock[clk_emmc] is inactive, usage 0, rate 192000000, parent[clk_192m]
[SLEEP_CLK_CHECK]clock[clk_sdio2] is inactive, usage 0, rate 48000000, parent[clk_48m]
[SLEEP_CLK_CHECK]clock[clk_sdio1] is inactive, usage 0, rate 96000000, parent[clk_96m]
[SLEEP_CLK_CHECK]clock[clk_sdio0] is inactive, usage 0, rate 192000000, parent[clk_192m]
[SLEEP_CLK_CHECK]clock[clk_nfc] is inactive, usage 0, rate 64000000, parent[clk_64m]
[SLEEP_CLK_CHECK]clock[clk_disc1_dpi] is inactive, usage 0, rate 128000000, parent[clk_128m]
[SLEEP_CLK_CHECK]clock[clk_disc1_dbi] is inactive, usage 0, rate 128000000, parent[clk_128m]
[SLEEP_CLK_CHECK]clock[clk_disc1] is inactive, usage 0, rate 153600000, parent[clk_153m6]
[SLEEP_CLK_CHECK]clock[clk_disc0_dpi] is inactive, usage 0, rate 384000000, parent[clk_384m]
[SLEEP_CLK_CHECK]clock[clk_disc0_dbi] is inactive, usage 0, rate 256000000, parent[clk_256m]
[SLEEP_CLK_CHECK]clock[clk_disc0] is inactive, usage 0, rate 256000000, parent[clk_256m]
[SLEEP_CLK_CHECK]clock[clk_gsp] is inactive, usage 0, rate 96000000, parent[clk_96m]
[SLEEP_CLK_CHECK]clock[clk_disp_emc] is inactive, usage 0, rate 128000000, parent[clk_aon_apb]
[SLEEP_CLK_CHECK]clock[clk_aon_apb] is active, usage 4, rate 128000000, parent[clk_128m]
[SLEEP_CLK_CHECK]clock[clk_emc] is active, usage 0, rate 200000000, parent[clk_533m]
[SLEEP_CLK_CHECK]clock[clk_pub_ahb] is active, usage 0, rate 153600000, parent[clk_153m6]
[SLEEP_CLK_CHECK]clock[clk_apb] is active, usage 0, rate 64000000, parent[clk_64m]
[SLEEP_CLK_CHECK]clock[clk_ahb] is active, usage 0, rate 192000000, parent[clk_192m]
[SLEEP_CLK_CHECK]clock[clk_dbg] is active, usage 0, rate 240000000, parent[clk_mcu]
[SLEEP_CLK_CHECK]clock[clk_axi] is active, usage 0, rate 600000000, parent[clk_mcu]
[SLEEP_CLK_CHECK]clock[clk_arm] is active, usage 0, rate 1200000000, parent[clk_mcu]
[SLEEP_CLK_CHECK]clock[clk_mcu] is active, usage 0, rate 1200000000, parent[clk_mpll]
[SLEEP_CLK_CHECK]clock[clk_38m4] is active, usage 0, rate 38400000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_76m8] is active, usage 0, rate 76800000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_51m2] is active, usage 0, rate 51200000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_153m6] is active, usage 0, rate 153600000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_64m] is active, usage 0, rate 64000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_128m] is active, usage 4, rate 128000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_256m] is inactive, usage 0, rate 256000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_12m] is active, usage 0, rate 12000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_24m] is active, usage 0, rate 24000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_48m] is active, usage 1, rate 48000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_96m] is inactive, usage 0, rate 96000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_192m] is inactive, usage 0, rate 192000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_384m] is inactive, usage 0, rate 384000000, parent[clk_tdpll]
[SLEEP_CLK_CHECK]clock[clk_52m] is active, usage 0, rate 52000000, parent[clk_cpll]
[SLEEP_CLK_CHECK]clock[clk_104m] is active, usage 0, rate 104000000, parent[clk_cpll]
[SLEEP_CLK_CHECK]clock[clk_208m] is active, usage 0, rate 208000000, parent[clk_cpll]
[SLEEP_CLK_CHECK]clock[clk_312m] is active, usage 0, rate 312000000, parent[clk_cpll]
[SLEEP_CLK_CHECK]clock[clk_40m] is active, usage 0, rate 40000000, parent[clk_wifipll]
[SLEEP_CLK_CHECK]clock[clk_51m2_w] is active, usage 0, rate 51200000, parent[clk_wpll]
[SLEEP_CLK_CHECK]clock[clk_66m] is active, usage 0, rate 66000000, parent[clk_dpll]
[SLEEP_CLK_CHECK]clock[clk_533m] is active, usage 0, rate 200000000, parent[clk_dpll]
[SLEEP_CLK_CHECK]clock[clk_37m5] is active, usage 0, rate 50000000, parent[clk_mpll]
[SLEEP_CLK_CHECK]clock[clk_300m] is active, usage 0, rate 400000000, parent[clk_mpll]
[SLEEP_CLK_CHECK]clock[clk_wifipll] is inactive, usage 0, rate 880000000, parent[clk_wifi_sel_i]
[SLEEP_CLK_CHECK]clock[clk_cpll] is inactive, usage 0, rate 624000000, parent[clk_c_sel_i]
[SLEEP_CLK_CHECK]clock[clk_wpll] is inactive, usage 0, rate 921600000, parent[clk_w_sel_i]
[SLEEP_CLK_CHECK]clock[clk_tdpll] is active, usage 6, rate 768000000, parent[clk_td_sel_i]
[SLEEP_CLK_CHECK]clock[clk_wifi_sel_i] is inactive, usage 0, rate 0, parent[none]
[SLEEP_CLK_CHECK]clock[clk_c_sel_i] is inactive, usage 0, rate 0, parent[none]
[SLEEP_CLK_CHECK]clock[clk_w_sel_i] is inactive, usage 0, rate 0, parent[none]
[SLEEP_CLK_CHECK]clock[clk_td_sel_i] is active, usage 6, rate 0, parent[none]
[SLEEP_CLK_CHECK]clock[clk_dpll] is active, usage 1, rate 200000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[clk_mpll] is active, usage 1, rate 1200000000, parent[ext_26m]
[SLEEP_CLK_CHECK]clock[ext_32k] is active, usage 1, rate 32768, parent[none]
[SLEEP_CLK_CHECK]clock[ext_26m] is active, usage 4, rate 26000000, parent[none]
<6>__iomap_page (0) pgd c0007d4c, pte ddcdbd00, *pte 60d00053
<6>__iomap_page (0) pgd c0007d4c, pte ddcdbd40, *pte 60e00053
<6>__iomap_page (0) pgd c0007d48, pte ddcdbbc0, *pte 60800053
<6>__iomap_page (0) pgd c0007d4c, pte ddcdbc00, *pte 60900053

[SLEEP_VREG_CHECK]: reg_name=vddcore, enable=1
[SLEEP_VREG_CHECK]: reg_name=vdd18, enable=-22
[SLEEP_VREG_CHECK]: reg_name=vdd25, enable=-22
[SLEEP_VREG_CHECK]: reg_name=vdd28, enable=1
[SLEEP_VREG_CHECK]: reg_name=vddarm, enable=1
[SLEEP_VREG_CHECK]: reg_name=vddcama, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddcamd, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddcamio, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddcammot, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddclsg, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddemmccore, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddemmcio, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddldo, enable=-22
[SLEEP_VREG_CHECK]: reg_name=vddmem, enable=1
[SLEEP_VREG_CHECK]: reg_name=vddrf0, enable=-22
[SLEEP_VREG_CHECK]: reg_name=vddrf1, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddrf2, enable=-22
[SLEEP_VREG_CHECK]: reg_name=vddsd, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddsim0, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddsim1, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddsim2, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddusb, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddwpa, enable=0
[SLEEP_VREG_CHECK]: reg_name=vddwrf, enable=0