USB Exposed Port System Test

最新推荐文章于 2019-08-01 22:18:14 发布

hgf1011

最新推荐文章于 2019-08-01 22:18:14 发布

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分类专栏： BIOS Internals

本文链接：https://blog.csdn.net/hgf1011/article/details/9382223

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在项目中调试'USB Exposed Port SystemTest'WHQL问题时，我们发现了一些关于USB端口配对映射的情况。根据Haswell Mobile Platform设计指南，硬件可以通过OC引脚改变端口配对映射，此时ACPI表格和BIOS需要更新以反映这种映射关系。文章提到了USB 3.0和2.0端口的配对规则以及BIOS在映射更改时所需进行的调整。

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We have some findings about USB port pair mapping during debug "USB Exposed Port SystemTest " WHQL issue in project side.

1. According to Haswell Mobile Platform design guide IBL#486713 page 247, It seems HW can change port pairing mapping by OC pins and if port pairing mapping changed,ACPI tables and BIOS should be updated to reflect the mapping.

15.5.1USB 3.0*/2.0 Port Pairing

The Haswell PCH has support for up to 6 USB 3.0 capable ports to provide support for Super Speed USB devices. In addition the PCH support up to 14 USB 2.0 ports that can be used to connect tohigh-speed, full-speed and low-speed USB devices. Haswell PCH incorporates anXHCI controller in addition to 2 EHCI controllers. The six USB 3.0 ports are mapped to 6 of the existing USB 2.0 ports. The only restriction on mapping USB3.0 signals with USB 2.0 signals to the same connector is determined by the Over current pins. Overcurrent Pins [0-3] m