状态标志说明: | ||||||||||||||
指令 | 操作数 | 描述 | ||||||||||||
ADD |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Add. Algorithm: operand1 = operand1 + operand2 Example: MOV AL, 5 ; AL = 5 ADD AL, -3 ; AL = 2 RET
| ||||||||||||
ADC |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Add with Carry. Algorithm: operand1 = operand1 + operand2 + CF Example: STC ; set CF = 1 MOV AL, 5 ; AL = 5 ADC AL, 1 ; AL = 7 RET
| ||||||||||||
INC |
REG
memory | Increment. Algorithm: operand = operand + 1 Example: MOV AL, 4 INC AL ; AL = 5 RET
| ||||||||||||
SUB |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Subtract. Algorithm: operand1 = operand1 - operand2 Example: MOV AL, 5 SUB AL, 1 ; AL = 4 RET
| ||||||||||||
SBB |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Subtract with Borrow. Algorithm: operand1 = operand1 - operand2 - CF Example: STC MOV AL, 5 SBB AL, 3 ; AL = 5 - 3 - 1 = 1 RET
| ||||||||||||
DEC |
REG
memory | Decrement. Algorithm: operand = operand - 1 Example: MOV AL, 255 ; AL = 0FFh (255 or -1) DEC AL ; AL = 0FEh (254 or -2) RET
| ||||||||||||
NEG |
REG
memory | Negate. Makes operand negative (two's complement). Algorithm:
MOV AL, 5 ; AL = 05h NEG AL ; AL = 0FBh (-5) NEG AL ; AL = 05h (5) RET
| ||||||||||||
CMP |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Compare. Algorithm: operand1 - operand2 result is not stored anywhere, flags are set (OF, SF, ZF, AF, PF, CF) according to result. Example: MOV AL, 5 MOV BL, 5 CMP AL, BL ; AL = 5, ZF = 1 (so equal!) RET
| ||||||||||||
MUL |
REG
memory | Unsigned multiply. Algorithm: when operand is a byte: when operand is a word:Example: MOV AL, 200 ; AL = 0C8h MOV BL, 4 MUL BL ; AX = 0320h (800) RET
| ||||||||||||
IMUL |
REG
memory | Signed multiply. Algorithm: when operand is a byte: when operand is a word:Example: MOV AL, -2 MOV BL, -4 IMUL BL ; AX = 8 RET
| ||||||||||||
DAA | No operands | Decimal adjust After Addition. Corrects the result of addition of two packed BCD values. Algorithm: if low nibble of AL > 9 or AF = 1 then:
MOV AL, 0Fh ; AL = 0Fh (15) DAA ; AL = 15h RET
| ||||||||||||
DAS | No operands | Decimal adjust After Subtraction. Corrects the result of subtraction of two packed BCD values. Algorithm: if low nibble of AL > 9 or AF = 1 then:
MOV AL, 0FFh ; AL = 0FFh (-1) DAS ; AL = 99h, CF = 1 RET
| ||||||||||||
AAA | No operands | ASCII Adjust after Addition. Corrects result in AH and AL after addition when working with BCD values. It works according to the following Algorithm: if low nibble of AL > 9 or AF = 1 then:
clear the high nibble of AL. Example: MOV AX, 15 ; AH = 00, AL = 0Fh AAA ; AH = 01, AL = 05 RET
| ||||||||||||
AAS | No operands | ASCII Adjust after Subtraction. Corrects result in AH and AL after subtraction when working with BCD values. Algorithm: if low nibble of AL > 9 or AF = 1 then:
clear the high nibble of AL. Example: MOV AX, 02FFh ; AH = 02, AL = 0FFh AAS ; AH = 01, AL = 09 RET
| ||||||||||||
AND |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Logical AND between all bits of two operands. Result is stored in operand1. These rules apply: 1 AND 1 = 1 1 AND 0 = 0 0 AND 1 = 0 0 AND 0 = 0 Example: MOV AL, 'a' ; AL = 01100001b AND AL, 11011111b ; AL = 01000001b ('A') RET
| ||||||||||||
OR |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Logical OR between all bits of two operands. Result is stored in first operand. These rules apply: 1 OR 1 = 1 1 OR 0 = 1 0 OR 1 = 1 0 OR 0 = 0 Example: MOV AL, 'A' ; AL = 01000001b OR AL, 00100000b ; AL = 01100001b ('a') RET
| ||||||||||||
XOR |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Logical XOR (Exclusive OR) between all bits of two operands. Result is stored in first operand. These rules apply: 1 XOR 1 = 0 1 XOR 0 = 1 0 XOR 1 = 1 0 XOR 0 = 0 Example: MOV AL, 00000111b XOR AL, 00000010b ; AL = 00000101b RET
| ||||||||||||
NOT |
REG
memory | Invert each bit of the operand. Algorithm:
MOV AL, 00011011b NOT AL ; AL = 11100100b RET
| ||||||||||||
TEST |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate | Logical AND between all bits of two operands for flags only. These flags are effected: ZF, SF, PF. Result is not stored anywhere. These rules apply: 1 AND 1 = 1 1 AND 0 = 0 0 AND 1 = 0 0 AND 0 = 0 Example: MOV AL, 00000101b TEST AL, 1 ; ZF = 0. TEST AL, 10b ; ZF = 1. RET
| ||||||||||||
SHL |
memory, immediate
REG, immediate memory, CL REG, CL | Shift operand1 Left. The number of shifts is set by operand2. Algorithm:
MOV AL, 11100000b SHL AL, 1 ; AL = 11000000b, CF=1. RET
| ||||||||||||
SHR |
memory, immediate
REG, immediate memory, CL REG, CL | Shift operand1 Right. The number of shifts is set by operand2. Algorithm:
MOV AL, 00000111b SHR AL, 1 ; AL = 00000011b, CF=1. RET
| ||||||||||||
SAL |
memory, immediate
REG, immediate memory, CL REG, CL | Shift Arithmetic operand1 Left. The number of shifts is set by operand2. Algorithm:
MOV AL, 0E0h ; AL = 11100000b SAL AL, 1 ; AL = 11000000b, CF=1. RET
| ||||||||||||
SAR |
memory, immediate
REG, immediate memory, CL REG, CL | Shift Arithmetic operand1 Right. The number of shifts is set by operand2. Algorithm:
MOV AL, 0E0h ; AL = 11100000b SAR AL, 1 ; AL = 11110000b, CF=0. MOV BL, 4Ch ; BL = 01001100b SAR BL, 1 ; BL = 00100110b, CF=0. RET
| ||||||||||||
ROL |
memory, immediate
REG, immediate memory, CL REG, CL | Rotate operand1 left. The number of rotates is set by operand2. Algorithm:
MOV AL, 1Ch ; AL = 00011100b ROL AL, 1 ; AL = 00111000b, CF=0. RET
| ||||||||||||
ROR |
memory, immediate
REG, immediate memory, CL REG, CL | Rotate operand1 right. The number of rotates is set by operand2. Algorithm:
MOV AL, 1Ch ; AL = 00011100b ROR AL, 1 ; AL = 00001110b, CF=0. RET
| ||||||||||||
RCL |
memory, immediate
REG, immediate memory, CL REG, CL | Rotate operand1 left through Carry Flag. The number of rotates is set by operand2. When immediate is greater then 1, assembler generates several RCL xx, 1 instructions because 8086 has machine code only for this instruction (the same principle works for all other shift/rotate instructions). Algorithm:
STC ; set carry (CF=1). MOV AL, 1Ch ; AL = 00011100b RCL AL, 1 ; AL = 00111001b, CF=0. RET
| ||||||||||||
RCR |
memory, immediate
REG, immediate memory, CL REG, CL | Rotate operand1 right through Carry Flag. The number of rotates is set by operand2. Algorithm:
STC ; set carry (CF=1). MOV AL, 1Ch ; AL = 00011100b RCR AL, 1 ; AL = 10001110b, CF=0. RET
| ||||||||||||
MOV |
REG, memory
memory, REG REG, REG memory, immediate REG, immediate SREG, memory memory, SREG REG, SREG SREG, REG | Copy operand2 to operand1. The MOV instruction cannot:
operand1 = operand2Example: #make_COM# ORG 100h MOV AX, 0B800h ; set AX = B800h (VGA memory). MOV DS, AX ; copy value of AX to DS. MOV CL, 'A' ; CL = 41h (ASCII code). MOV CH, 01011111b ; CL = color attribute. MOV BX, 15Eh ; BX = position on screen. MOV [BX], CX ; w.[0B800h:015Eh] = CX. RET ; returns to operating system.
| ||||||||||||
MOVSB | No operands | Copy byte at DS:[SI] to ES:[DI]. Update SI and DI. Algorithm:
#make_COM# ORG 100h LEA SI, a1 LEA DI, a2 MOV CX, 5 REP MOVSB RET a1 DB 1,2,3,4,5 a2 DB 5 DUP(0)
| ||||||||||||
MOVSW | No operands | Copy word at DS:[SI] to ES:[DI]. Update SI and DI. Algorithm:
#make_COM# ORG 100h LEA SI, a1 LEA DI, a2 MOV CX, 5 REP MOVSW RET a1 DW 1,2,3,4,5 a2 DW 5 DUP(0)
| ||||||||||||
STOSB | No operands | Store byte in AL into ES:[DI]. Update SI. Algorithm:
#make_COM# ORG 100h LEA DI, a1 MOV AL, 12h MOV CX, 5 REP STOSB RET a1 DB 5 dup(0)
| ||||||||||||
STOSW | No operands | Store word in AX into ES:[DI]. Update SI. Algorithm:
#make_COM# ORG 100h LEA DI, a1 MOV AX, 1234h MOV CX, 5 REP STOSW RET a1 DW 5 dup(0)
| ||||||||||||
LODSB | No operands | Load byte at DS:[SI] into AL. Update SI. Algorithm:
#make_COM# ORG 100h LEA SI, a1 MOV CX, 5 MOV AH, 0Eh m: LODSB INT 10h LOOP m RET a1 DB 'H', 'e', 'l', 'l', 'o'
| ||||||||||||
LODSW | No operands | Load word at DS:[SI] into AX. Update SI. Algorithm:
#make_COM# ORG 100h LEA SI, a1 MOV CX, 5 REP LODSW ; finally there will be 555h in AX. RET a1 dw 111h, 222h, 333h, 444h, 555h
| ||||||||||||
REP |
chain instruction
| Repeat following MOVSB, MOVSW, LODSB, LODSW, STOSB, STOSW instructions CX times. Algorithm: check_cx: if CX <> 0 then
| ||||||||||||
CLD | No operands | Clear Direction flag. SI and DI will be incremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW. Algorithm: DF = 0
| ||||||||||||
STD | No operands | Set Direction flag. SI and DI will be decremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW. Algorithm: DF = 1
| ||||||||||||
CMPSB | No operands | Compare bytes:
ES:[DI] from DS:[SI].
Algorithm:
see cmpsb.asm in Samples.
| ||||||||||||
CMPSW | No operands | Compare words:
ES:[DI] from DS:[SI].
Algorithm:
see cmpsw.asm in Samples.
| ||||||||||||
SCASB | No operands | Compare bytes:
AL from ES:[DI].
Algorithm:
| ||||||||||||
SCASW | No operands | Compare words:
AX from ES:[DI].
Algorithm:
| ||||||||||||
REPE |
chain instruction
| Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Equal), maximum CX times. Algorithm: check_cx: if CX <> 0 then
see cmpsb.asm in Samples.
| ||||||||||||
REPNE |
chain instruction
| Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Equal), maximum CX times. Algorithm: check_cx: if CX <> 0 then
| ||||||||||||
REPZ |
chain instruction
| Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Zero), maximum CX times. Algorithm: check_cx: if CX <> 0 then
| ||||||||||||
REPNZ |
chain instruction
| Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Zero), maximum CX times. Algorithm: check_cx: if CX <> 0 then
| ||||||||||||
IN |
AL, im.byte
AL, DX AX, im.byte AX, DX | Input from port into AL or AX. Second operand is a port number. If required to access port number over 255 - DX register should be used. Example: IN AX, 4 ; get status of traffic lights. IN AL, 7 ; get status of stepper-motor.
| ||||||||||||
OUT |
im.byte, AL
im.byte, AX DX, AL DX, AX | Output from AL or AX to port. First operand is a port number. If required to access port number over 255 - DX register should be used. Example: MOV AX, 0FFFh ; Turn on all OUT 4, AX ; traffic lights. MOV AL, 100b ; Turn on the third OUT 7, AL ; magnet of the stepper-motor.
| ||||||||||||
JMP |
label
4-byte address | Unconditional Jump. Transfers control to another part of the program. 4-byte address may be entered in this form: 1234h:5678h, first value is a segment second value is an offset. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 5 JMP label1 ; jump over 2 lines! PRINT 'Not Jumped!' MOV AL, 0 label1: PRINT 'Got Here!' RET
| ||||||||||||
JZ | label | Short Jump if Zero (equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 5 CMP AL, 5 JZ label1 PRINT 'AL is not equal to 5.' JMP exit label1: PRINT 'AL is equal to 5.' exit: RET
| ||||||||||||
JNZ | label | Short Jump if Not Zero (not equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags. JNZ label1 PRINT 'zero.' JMP exit label1: PRINT 'not zero.' exit: RET
| ||||||||||||
JS | label | Short Jump if Signed (if negative). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 10000000b ; AL = -128 OR AL, 0 ; just set flags. JS label1 PRINT 'not signed.' JMP exit label1: PRINT 'signed.' exit: RET
| ||||||||||||
JNS | label | Short Jump if Not Signed (if positive). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags. JNS label1 PRINT 'signed.' JMP exit label1: PRINT 'not signed.' exit: RET
| ||||||||||||
JO | label | Short Jump if Overflow. Algorithm:
; -5 - 127 = -132 (not in -128..127) ; the result of SUB is wrong (124), ; so OF = 1 is set: include 'emu8086.inc' #make_COM# org 100h MOV AL, -5 SUB AL, 127 ; AL = 7Ch (124) JO label1 PRINT 'no overflow.' JMP exit label1: PRINT 'overflow!' exit: RET
| ||||||||||||
JNO | label | Short Jump if Not Overflow. Algorithm:
; -5 - 2 = -7 (inside -128..127) ; the result of SUB is correct, ; so OF = 0: include 'emu8086.inc' #make_COM# ORG 100h MOV AL, -5 SUB AL, 2 ; AL = 0F9h (-7) JNO label1 PRINT 'overflow!' JMP exit label1: PRINT 'no overflow.' exit: RET
| ||||||||||||
JP | label | Short Jump if Parity (even). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 00000101b ; AL = 5 OR AL, 0 ; just set flags. JP label1 PRINT 'parity odd.' JMP exit label1: PRINT 'parity even.' exit: RET
| ||||||||||||
JNP | label | Short Jump if No Parity (odd). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 00000111b ; AL = 7 OR AL, 0 ; just set flags. JNP label1 PRINT 'parity even.' JMP exit label1: PRINT 'parity odd.' exit: RET
| ||||||||||||
JB | label | Short Jump if first operand is Below second operand (as set by CMP instruction). Unsigned. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 1 CMP AL, 5 JB label1 PRINT 'AL is not below 5' JMP exit label1: PRINT 'AL is below 5' exit: RET
| ||||||||||||
JNB | label | Short Jump if first operand is Not Below second operand (as set by CMP instruction). Unsigned. Algorithm:
include 'emu8086.inc' #make_COM# ORG 100h MOV AL, 7 CMP AL, 5 JNB label1 PRINT 'AL < 5.' JMP exit label1: PRINT 'AL >= 5.' exit: RET
| ||||||||||||