A Beginner’s Guide on Interrupt Latency - and Interrupt Latency of the Arm Cortex-M processors

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于 2021-05-17 16:27:19 发布

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分类专栏： CPU体系架构学习笔记文章标签： interrupt latency ARM-M

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本文介绍了中断延迟的基本概念，强调了它对于实时应用的重要性。中断延迟不仅包括处理器响应中断请求所需的时钟周期数，还涉及处理器在中断发生时的执行状态。文章探讨了Cortex-M处理器家族的中断延迟特性，特别是其Nested Vector Interrupt Controller (NVIC)，并指出中断延迟并不等同于完整的中断处理性能。最后，讨论了如Tail chaining、Late Arrival和Pop pre-emption等优化技术如何减少额外开销和提高能效。

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Introduction

All experienced embedded system designers know that interrupt latency is one of the key characteristics of a microcontrolller, and are aware that this is crucial for many applications with real time requirements. However, the descriptions of interrupt latency in various microcontroller literature often oversimplifies exactly what is included in the ‘interrupt latency’ detail.

This blog will cover the basics of interrupt latency, and what users need to be aware of when selecting a microcontroller with low interrupt latency requirements.

The Definition of Interrupt Latency

The term interrupt latency refers to the number of clock cycles required for a processor to respond to an interrupt request, this is typically a measure based on the numb