修改DDR频率
Amlogic 7.1 p281
路径:uboot/board/amlogic/configs/gxl_p281_v1.h
#define CONFIG_DDR_CLK 666 //ddr3频率默认为666
Amlogic 9.0 S905X3:
路径:bootloader/uboot-repo/bl33/board/amlogic/sm1_ac214_v1/firmware/timing.c
.DRAMFreq = {648, 0, 0, 0} //ddr3 频率默认为648