Make Tips

网上或书上的makefile教程大多都很简单，而实际工程的makefile往往又很复杂，这时可以去gnu上查阅，  make手册的网址是：  http://www.gnu.org/software/make/manual/make.html，
直接查找就行了，没有什么地方比gnu官方手册更权威全面了
以下为我总结的一些makefile要点，以方便查阅，随时补充：
1.   一个约定：make默认将试图创建列在makefile文件中的第一个目标（以.开头的目标不算，例如 :  .phony)，许多程序员都会在自己的makefile文件中将第一个目标定义为all，然后在列出其他的从属目标，这样可以明确的告诉make 命令，在未指定特定目标时，默认情况下应该创建哪个目标，我们应坚持使用这一约定。
2     规则所在的行必须以制表符tab开头，但空格是不行的，此外，如果makefile文件中的某行以空格结尾 ，它也会导致make命令执行失败。
3.    make命令内置了一些特殊的宏定义。使用它们可以使makefile文件更加简洁:
        $?            列出当前目标依赖的文件列表中比当前目标文件还要新的文件
        $@          当前目标的名字
        $<      当前目标依赖的第一个文件名    
        $^            当前目标依赖的所有文件（去除重复的文件名）
         $*           不包括后缀名的当前依赖文件的名字
4.    在makefile文件中，我们还经常看到另外两个有用的特殊字符，它们出现在命令之前：
        －  忽略所有错误
            exp：   －mkdir  yourdirectories  如果你想创建的目录已存在，错误信息不会提示
        @   告诉make在执行某条命令前不将该命令本身输出到标准输出。想用echo命令给出一些提示    信息时，这个字符将非常有用。
  5   命令行上的宏定义：  命令行上的宏定义将替换在makeifle中的宏定义。
                                exp：     make CC=gcc
     宏定义必须有单个参数的形式传递，要避免在宏定义中使用空格或引号，下例是错误的：
                            make "CC = c89"
6.make -jN   允许 make命令同时执行N条命令，可节省时间，一般以-j3为出发点
7.gcc  -MM   产生一个适用于make命令的依赖关系清单
8.     include filenames...    (filenames允许使用正则表达式）
                  暂停读取当前makefile文件，转而去读取包含进来的makefile文件等，
        注意：前面不允许有TAB键，但可以有空格，因为以TAB键开头代表着命令
      
             -include filenames...  忽略所有错误。（为于其他make兼容，使用sinclude代替.include
9.  $(lastword names...)
    The argument names is regarded as a series of names, separated by whitespace. The value is the last name in the series.
    For example,
              $(lastword foo bar)
        
    produces the result `bar'.
10.还有另一种定义变量的方式simply-expanded (:=) variable definitions.：
            
      exp:
      x := foo
     y := $(x) bar
     x := later
is equivalent to
     y := foo bar
     x := later
11.当你要引用make的变量的时候，使用$(VAR)就可以了，但是如果你想要引用外部shell的变量，你必须使用$$(VAR).
以下几段有点不懂：留待以后查阅：
   2.3 How make Processes a Makefile
           Before recompiling an object file, make considers updating its prerequisites, the source file and header files. This makefile does not specify anything to be done for them—the `.c' and `.h' files are not the targets of any rules—so make does nothing for these files. But make would update automatically generated C programs, such as those made by Bison or Yacc, by their own rules at this time.
      3.4 The Variable MAKEFILES
If the environment variable MAKEFILES is defined, make considers its value as a list of names (separated by whitespace) of additional makefiles to be read before the others. This works much like the include directive: various directories are searched for those files (see Including Other Makefiles). In addition, the default goal is never taken from one of these makefiles and it is not an error if the files listed in MAKEFILES are not found.
The main use of MAKEFILES is in communication between recursive invocations of make (see Recursive Use of make). It usually is not desirable to set the environment variable before a top-level invocation of make, because it is usually better not to mess with a makefile from outside. However, if you are running make without a specific makefile, a makefile in MAKEFILES can do useful things to help the built-in implicit rules work better, such as defining search paths (see Directory Search).
Some users are tempted to set MAKEFILES in the environment automatically on login, and program makefiles to expect this to be done. This is a very bad idea, because such makefiles will fail to work if run by anyone else. It is much better to write explicit include directives in the makefiles. See Including Other Makefiles.