qemu-arm64 添加acpi platform设备

lonely_geek

已于 2023-02-01 21:44:06 修改

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分类专栏：虚拟化文章标签： qemu 虚拟化 acpi smmu

于 2023-02-01 21:32:00 首次发布

本文链接：https://blog.csdn.net/lonely_geek/article/details/128840962

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/*** 配置acpi的dsdt表：   /hw/arm/virt-apci-build.c ***/

/** add dsdt item **/
static void acpi_dsdt_add_dpe(Aml *scope)
{
    Aml *dev = aml_device("DPE0");
    struct CrsRangeEntry cre = {0x7000000000, 0x707FFFFFFF};
    uint32_t dpe_irqs[] = {32};
  
    aml_append(dev, aml_name_decl("_HID", aml_string("JNET00C0")));
    aml_append(dev, aml_name_decl("_UID", aml_int(0)));
    aml_append(dev, aml_name_decl("_CCA", aml_int(1)));

    Aml *crs = aml_resource_template();
    aml_append(crs, aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED,
                                        AML_MAX_FIXED,
                                        AML_NON_CACHEABLE, AML_READ_WRITE,
                                        0, cre.base, cre.limit,
                                        0, cre.limit - cre.base + 1));
    
    aml_append(crs,
               aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
                             AML_EXCLUSIVE, dpe_irqs, 1));
    
    aml_append(dev, aml_name_decl("_CRS", crs));

    aml_append(scope, dev);
}

/* DSDT */
static void build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
{
	/* .... */
	acpi_dsdt_add_dpe(scope);
	/* .... */
}



/* 如设备需支持SMMUV3的地址翻译，则需构建iort表相关内容，参照如下 */
/* IORT */
uint32_t dpe_stream_id = 24; 
#define NAMED_COMPONENT_ENTRY_SIZE 45
static void build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
{
	/* .... */
	const char name[] = "\\_SB_.DPE0";
	int named_componet_count = 1;
	/* .... */
	nb_nodes = 4; /* RC, ITS, SMMUv3 and NC */
	/* .... */
	/* NAMED_COMPONENT : apply to platform device */
	build_append_int_noprefix(table_data, 1, 1); /* Type */
	node_size =  NAMED_COMPONENT_ENTRY_SIZE + ID_MAPPING_ENTRY_SIZE * named_componet_count;
	build_append_int_noprefix(table_data, node_size, 2); /* Length */
	build_append_int_noprefix(table_data, 3, 1); /* Revision */
	build_append_int_noprefix(table_data, id++, 4); /* Identifier */
	/* Number of ID mappings */
	build_append_int_noprefix(table_data, named_componet_count, 4);
	/* Reference to ID Array */
	build_append_int_noprefix(table_data, NAMED_COMPONENT_ENTRY_SIZE, 4);
	/* Flags */
	build_append_int_noprefix(table_data, 0, 4);
	/* Memeroy acess properties */  
	build_append_int_noprefix(table_data, 1, 8);
	/* Memory address size limit */
	build_append_int_noprefix(table_data, 48, 1);
	/* Device Name */	
	g_array_append_vals(table_data, name, 16);
	/* Table 4 ID mapping format */
	build_append_int_noprefix(table_data, 0, 4); /* Input base */
	build_append_int_noprefix(table_data, 1, 4); /* Number of IDs */
	build_append_int_noprefix(table_data, dpe_stream_id, 4); /* Output base : reply to stream-id */
	build_append_int_noprefix(table_data, smmu_offset, 4); /* Output Reference */
	build_append_int_noprefix(table_data, 1 , 4); /* Single mapping (enabled) */
	/* .... */
}