敏俊物联MJIOT-AMB-02 RTL8195M 高性能wifi模块

敏俊物联MJIOT-AMB-02 RTL8195M 高性能wifi模块

MJIOT-AMB-02介绍
MJIOT-AMB-02是一个完整且自成体系的 物联网解决方案,能够独立运行,也可以作为从机搭载于其他主机MCU 运行。MJIOT-AMB-02也可以作为产品中应⽤处理器,使用我们提供的sdk,根据客户的需求定制方案,不仅可以降到整个产品的价格,也可以方便后续的维护升级

MJIOT-AMB-02内部集成的单芯片低功耗802.11n无线局域网(WLAN)网络控制器.它集成一个ARM-CM3内核,无线局域网MAC,WLAN基带和射频RF。它可以提供了一个可配置的一些GPIO用于配置不同的应用和控制。瑞昱RTL8195AM内部集成了内存和flash可以完成所有的wifi协议栈功能,还提供应用程序开发所需要的的内存和flash。

MJIOT-AMB-02主要性能指标
内置低功耗 32 位 ARM-CM3 CPU.
支持HT40/HT20,内置 TCP/IP 协议栈.
支持最多30个GPIO.
支持J-Link/JTAG/CMSIS-DAP调试.
支持 STA/AP/STA+AP 工作模式.
802.11b 模式下+ 17 dBm 的输出功率.
待机状态消耗功率小于1.0 mW (DTIM3).
支持freeRtos嵌入式操作系统,LWIP网络协议栈.
支持两路高速串口(最高波特率4M b/s)和一个log串口.
支持802.11 b/g/n模式,g模式最高传输速率54Mbps,n模式最高传输速率150Mbps.
2个SPI接口,支持SPI主从模式和DMA,从模式波特率最高2.6MHz.
4个I2C、支持SPI主从模式和DMA,最高访问速度是3.4Mb/s.
支持 Smart Config 功能(包括 Android 和 iOS 设备).
工作温度范围: -20℃ - 85℃.
2个ADC、一个DAC.
支持NFC.
支持IIS,支持音响方案.
支持ethernet,支持有线网.
支持SDIO主从模式,支持SD卡应用.
支持USB主从模式,支持摄像头方案.
支持arduino.
开源项目,支持win和linux.
支持TCP/UDP/HTTP/FTP/SNTP/MQTT/SMTP.
模块尺寸:24mm*16mm*0.8mm
支持 STA/AP/STA+AP 工作模式.
802.11b 模式下+ 17 dBm 的输出功率.
正常待机功耗:30mA.
这里写图片描述
这里写图片描述

RTL8881AM datasheet 5.1. PACKAGE IDENTIFICATION...........................................................................................................................................6 6. PIN DESCRIPTIONS.........................................................................................................................................................6 6.1. CONFIGURATION UPON POWER ON STRAPPING ...........................................................................................................9 6.2. SHARED I/O PIN MAPPING (DRQFN-164) .................................................................................................................11 6.3. GMAC PIN MODE DESCRIPTION ...............................................................................................................................13 6.3.1. MAC Interface MII/GMII/RGMII Mode Pin Sharing Mappings ..........................................................................13 6.3.2. GMII/RGMII Interface Pin Descriptions..............................................................................................................13 6.3.3. MII MAC Mode Interface Pin Descriptions .........................................................................................................14 6.3.4. MII PHY Mode Interface Pin Descriptions ..........................................................................................................14 7. MEMORY CONTROLLER............................................................................................................................................15 7.1. SDR DRAM CONTROL INTERFACE ...........................................................................................................................15 7.1.1. Features................................................................................................................................................................15 7.1.2. Bank2 and Bank3..................................................................................................................................................15 7.2. DDR DRAM CONTROLLER .......................................................................................................................................16 7.2.1. Features................................................................................................................................................................16 7.3. SPI FLASH CONTROLLER ...........................................................................................................................................16 7.3.1. Features................................................................................................................................................................16 7.3.2. Pin Mode and Definition of Serial and Dual I/O..................................................................................................16 7.4. SOFTWARE REGISTER DEFINITIONS ...........................................................................................................................17 7.4.1. Memory Control Register (MCR) (0xB800_1000) ...............................................................................................17 7.4.2. DRAM Configuration Register (DCR) (0xB800_1004)........................................................................................18 7.4.3. DRAM Timing Register (DTR) (0xB800_1008)....................................................................................................20 7.4.4. DDR DRAM Calibration Register (DDCR) (0xB800_1050)................................................................................22 7.4.5. SPI Flash Configuration Register (SFCR) (0xB800_1200)..................................................................................23 7.4.6. SPI Flash Configuration Register 2 (SFCR2) (0xB800_1204).............................................................................23 7.4.7. SPI Flash Control & Status Register (SFCSR) (0xB800_1208) ...........................................................................24 7.4.8. SPI Flash Data Register (SFDR) (0xB800_120C) ...............................................................................................25 7.4.9. SPI Flash Data Register 2 (SFDR2) (0xB800_1210)...........................................................................................25 8. PERIPHERAL AND MISC CONTROLS......................................................................................................................26 8.1. INTERRUPT CONTROL REGISTERS ..............................................................................................................................26 8.1.1. Global Interrupt Mask Register (GIMR) (0x B800_3000) ...................................................................................26 8.1.2. Global Interrupt Status Register (GISR) (0x B800_3004)....................................................................................28 8.1.3. Interrupt Routing Register 0 (IRR0) (0xB800_3008) ...........................................................................................29 8.1.4. Interrupt Routing Register 1 (IRR1) (0xB800_300C)...........................................................................................29 8.1.5. Interrupt Routing Register 2 (IRR2) (0xB800_3010) ...........................................................................................29 8.1.6. Interrupt Routing Register 3 (IRR3) (0xB800_3014) ...........................................................................................30 8.1.7. Global Interrupt Mask Register 2 (GIMR2) (0xb800-3020).................................................................................30 8.1.8. Global Interrupt Status Register 2(GISR2) (0xB800-3024) .................................................................................31 8.1.9. Interrupt Routing Register 4 (IRR4) (0xB800-3028)............................................................................................32
评论
添加红包

请填写红包祝福语或标题

红包个数最小为10个

红包金额最低5元

当前余额3.43前往充值 >
需支付:10.00
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包
实付
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明:

1.余额是钱包充值的虚拟货币,按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载,可以购买VIP、付费专栏及课程。

余额充值