ARM Generic Interrupt COntroler (GIC)-Introduction

Introduction

• Based on GICv3 v4, with ARMv8-A and ARMv8-R.
• from hardware perspective
• may have notes compared with RISCV PLIC
• on learning, part of the context may updated sometime later

GIC

architected resource supporting and controlling interrupts. It provide:

• 寄存器组：包括中断源管理，终端行为，中断发送（routing）到一个或者多个PE
• 支持以下结构：
  
  • ARMv8 arch
  • Locality-specific Peripheral Interrupts LPIs
  • Private Peripheral Interrupts PPIs
  • Software Generated Interrupts SGIs
  • Shared Peripheral Interrupts SPIs
  • Interrupt mask and priority
  • Uni or multi processor
  • wakeup events in power management env

这些中断发送给每个PE中就是我们熟悉的IRQ和IFQ。
GIC支持根据Security state的不同操作，支持Non-secure 下的virtualization。

NOTE：

• ARM在GIC中包含了软件中断，RISCV只有core里有xIP寄存器可以设软件中断，PLIC中没有该功能。

GIC v3 improvement based on v2

• GIC scalability
  
  • v2最大支持8个PE，v3增加了affinity routing功能（需要在GICD.CTLR中enable），由Redistributer实现
• Interrupt Grouping: to align interrupt handling with ARMv8 Exception model
  
  • Group 0 physical Interrupt expected handleed at highest implemented Exception level
  • Secure Group1 physical Interrupt expected handleed at Secure EL1
  • Non-Secure Group 1 physical interrupt expected handled at Non-secure EL2 for virtualization， or Non-secure EL1 for non-virtualization
• GICv3 Interrupt grouping support：
  
  • Config to be Group0, Seure Group1, Non-secure Group1
  • Group0->PE by FIQ
  • Group1 ->PE by IRQ, handling depend on Security State
  • Unified scheme for handling priority of Group0and Group1
• Interrupt Translation Service ITS：软件控制方法，将中断转换为物理中断或者虚拟中断
  
  • allows software to control how interrupt translated into Physical (v3/v4) or Virtual (v4) interrupt
  • ITS控制通过command interface和特殊的mapping地址（associated table-based structures in memory）
  • ITS输出为LPIs，一种message-based Interrupt
• Locality-specific Peripheral Interrupts LPIs
  
  • 新的Interrupt类型，extends Interrupt ID space
  • optional。if implemented，由ITS support
• Software Generate Interrupts SGIs
  
  • modified context of SGI
  • nt includes identity of source PE. why?
• Shared Peripheral Interrupts SPIs
  
  • add new regs in Distributer to support setting and clearing of nessage-based SPIs
• System Register Interface
  
  • 使用system register instruction进行控制
  • all are memory mapped
  • 需要在对应EL的ICC_SRE.SRE中enable该interface

GIC v4 improvement

• support for direct injection of virtual interrupts to a VM, without involving Hypervisor.
  
  • system at least needs one ITS that translate interrupts into LPIs.

Question:
- why need to group?