dbsct.c 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :dbsct.c */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Setting of B,R Section */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
#pragma section $DSEC
static const struct {
char *rom_s; /* Start address of the initialized data section in ROM */
char *rom_e; /* End address of the initialized data section in ROM */
char *ram_s; /* Start address of the initialized data section in RAM */
}DTBL[]= {
{__sectop("D"), __secend("D"), __sectop("R")},
// {__sectop("$ABS8D"), __secend("$ABS8D"), __sectop("$ABS8R")},
// {__sectop("$ABS16D") , __secend("$ABS16D") , __sectop("$ABS16R") }
};
#pragma section $BSEC
static const struct {
char *b_s; /* Start address of non-initialized data section */
char *b_e; /* End address of non-initialized data section */
}BTBL[]= {
{__sectop("B"), __secend("B")},
// {__sectop("$ABS8B"), __secend("$ABS8B")},
// {__sectop("$ABS16B"), __secend("$ABS16B")}
};
hwsetup.c 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :hwsetup.c */
/* DATE :Thu, Sep 15, 2005 */
/* DESCRIPTION :Hardware Setup file */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
/******************************************************************************
* *
* M O D U L E D E F I N E *
* *
******************************************************************************/
#define HwSetup_C
/******************************************************************************
* *
* C O M P I L E R D E F I N E D I N C L U D E F I L E S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* U S E R D E F I N E D I N C L U D E F I L E S *
* *
******************************************************************************/
#include "Common.h"
#include "XCore.h"
/******************************************************************************
* *
* L O C A L D E F I N E S *
* *
******************************************************************************/
#define CACHE_MEMORY_ADDR (VOLATILE INT *)0xfffff000
#define CACHE_MEMORY_LEN_INT 256
/******************************************************************************
* *
* L O C A L T Y P E D E F S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* L O C A L F U N C T I O N P R O T O T Y P E S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* L O C A L I N I T I A L I Z E D D A T A D E F I N I T I O N S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* L O C A L U N I T I A L I Z E D D A T A D E F I N I T I O N S *
* *
******************************************************************************/
/******************************************************************************
*
* Function:
* InitialIO
*
* Description:
* This global function initializes the CPU IO.
*
* Input:
* None
*
* Output:
* None.
*
******************************************************************************/
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
VOID InitialIO(VOID)
{
// Initial I/O port -- Start
// F3-C F2-8 F1-4 F0-0
// F3-3 F2-2 F1-1 F0-0
/*-----------------------------------------------------------------------
Port A dircection function mode Dir/Init
BIT15 -> /TPH Latch (F0-0 I/O ) (O 1)
BIT14 -> /RD (F1-1 /RD ) (O x)
BIT13 -> /WRH (F1-4 /WRH ) (O x)
BIT12 -> /WRL (F1-1 /WRL ) (O x)
BIT11 -> /CS1 (F1-4 /CS1 ) (O x)
BIT10 -> /CS0 (F1-1 /CS0 ) (O x)
BIT9 <- USB (IRQ3) (F2-8 /IRQ3 ) (I x)
BIT8 <- Power down (IRQ2) (F2-2 /IRQ2 ) (I x)
BIT7 -> /CS3 (F2-8 /CS3 ) (O x)
BIT6 -> /CS2 (F2-2 /CS2 ) (O x)
BIT5 -> TPH CLK (F1-4 SCK1 ) (O x)
BIT4 -> TPH Data (F1-1 TxD1 ) (O x)
BIT3 -> RS232 CTS (F0-0 I/O ) (O 1)
BIT2 <- RS232 RTS (F0-0 I/O ) (I x)
BIT1 -> RS232 TxD (F1-4 TxD0 ) (O x)
BIT0 <- RS232 RxD (F1-1 RxD0 ) (I x)
--------------------------------------------------------------------------*/
// 00 01 01 01 01 01 10 10
PFC.PACRL1.WORD = 0x155A;
// 10 10 01 01 00 00 01 01
PFC.PACRL2.WORD = 0xA505;
PFC.PAIORL.WORD = 0xFCFA;
PA.DR.WORD.L = 0xFFFF;
/*-----------------------------------------------------------------------
Port B dircection function mode Dir/Init
BIT9 -> A21 (F2-8 A21 ) (O x)
BIT8 -> A20 (F2-2 A20 ) (O x)
BIT7 -> A19 (F2-8 A19 ) (O x)
BIT6 -> A18 (F2-2 A18 ) (O x)
BIT5 -> RDWR (F3-C RDWR ) (O x)
BIT4 -> /CASH (F3-3 /CASH ) (O x)
BIT3 -> /CASL (F3-C /CASL ) (O x)
BIT2 -> /RAS (F3-3 /RAS ) (O x)
BIT1 -> A17 (F1-4 A17 ) (O x)
BIT0 -> A16 (F1-1 A16 ) (O x)
--------------------------------------------------------------------------*/
// 00 00 00 00 00 00 10 10
PFC.PBCR1.WORD = 0x000A;
// 10 10 11 11 11 11 01 01
PFC.PBCR2.WORD = 0xAFF5;
PFC.PBIOR.WORD = 0xFFFF;
/*-----------------------------------------------------------------------
Port C dircection function mode Dir/Init
BIT15 -> A15 (F1-8 A15 ) (O x)
BIT14 -> A14 (F1-4 A14 ) (O x)
BIT13 -> A13 (F1-2 A13 ) (O x)
BIT12 -> A12 (F1-1 A12 ) (O x)
BIT11 -> A11 (F1-8 A11 ) (O x)
BIT10 -> A10 (F1-4 A10 ) (O x)
BIT9 -> A9 (F1-2 A9 ) (O x)
BIT8 -> A8 (F1-1 A8 ) (O x)
BIT7 -> A7 (F1-8 A7 ) (O x)
BIT6 -> A6 (F1-4 A6 ) (O x)
BIT5 -> A5 (F1-2 A5 ) (O x)
BIT4 -> A4 (F1-1 A4 ) (O x)
BIT3 -> A3 (F1-8 A3 ) (O x)
BIT2 -> A2 (F1-4 A2 ) (O x)
BIT1 -> A1 (F1-2 A1 ) (O x)
BIT0 -> A0 (F1-1 A0 ) (O x)
--------------------------------------------------------------------------*/
PFC.PCCR.WORD = 0xFFFF;
PFC.PCIOR.WORD = 0xFFFF;
/*-----------------------------------------------------------------------
Port D dircection function mode Dir/Init
BIT15 <-> D15 (F1-8 D15 ) (I/O)
BIT14 <-> D14 (F1-4 D14 ) (I/O)
BIT13 <-> D13 (F1-2 D13 ) (I/O)
BIT12 <-> D12 (F1-1 D12 ) (I/O)
BIT11 <-> D11 (F1-8 D11 ) (I/O)
BIT10 <-> D10 (F1-4 D10 ) (I/O)
BIT9 <-> D9 (F1-2 D9 ) (I/O)
BIT8 <-> D8 (F1-1 D8 ) (I/O)
BIT7 <-> D7 (F1-8 D7 ) (I/O)
BIT6 <-> D6 (F1-4 D6 ) (I/O)
BIT5 <-> D5 (F1-2 D5 ) (I/O)
BIT4 <-> D4 (F1-1 D4 ) (I/O)
BIT3 <-> D3 (F1-8 D3 ) (I/O)
BIT2 <-> D2 (F1-4 D2 ) (I/O)
BIT1 <-> D1 (F1-2 D1 ) (I/O)
BIT0 <-> D0 (F1-1 D0 ) (I/O)
--------------------------------------------------------------------------*/
PFC.PDCRL.WORD = 0xFFFF;
PFC.PDIORL.WORD = 0xFFFF;
/*-----------------------------------------------------------------------
Port E dircection function mode Dir/Init
BIT15 <- Head Sensor (F0-0 I/O ) (I x)
BIT14 <-> RTC_IO (F0-0 I/O ) (I x)
BIT13 -> TPH_STROBE4|RTC_RST (F0-0 I/O ) (O 0)|(O 0)
BIT12 -> SUSPEND(USB) (F0-0 I/O ) (O 0)
BIT11 <- Cutter Sensor|LED2 (F0-0 I/O ) (I x)|(O 1)
BIT10 -> TPH_STROBE3|None (F0-0 I/O ) (O 0)|(I x)
BIT9 <- KEY2 (F0-0 I/O ) (I x)
BIT8 <- KEY1|LED3 (F0-0 I/O ) (I x)|(O 1)
BIT7 -> TPH_STROBE2|RTC_CLK (F0-0 I/O ) (O 0)|(O 1)
BIT6 <- DC Encoder (F1-1 TIOC2A) (I x)
BIT5 -> TPH_STROBE1 (F0-0 I/O ) (O 0)
BIT4 -> DC Motor (F1-1 TIOC1A) (O 1)
BIT3 <- /Centronic Strobe (F0-0 I/O ) (I x)
BIT2 -> PortA Protect|LED1 (F1-1 TIOC0C) (O 1)|(O 1)
BIT1 -> BM Out|Key3 (F1-1 TIOC0B) (O 1)|(I,x)
BIT0 -> GAP Out (F1-1 TIOC0A) (O 1)
--------------------------------------------------------------------------*/
// 00 00 00 00 00 00 00 00
PFC.PECR1.WORD = 0x0000;
// 00 01 00 00 00 00 00 00
PFC.PECR2.WORD = 0x1000;
#if defined(TTP243_PCB)
PFC.PEIOR.WORD = 0x34B7; // 0011 0100 1011 0111
PE.DR.WORD = 0xCB5F;
#elif defined(TDP643_PCB)
PFC.PEIOR.WORD = 0x36B7; // 0011 0110 1011 0111
PE.DR.WORD = 0xCB5F;
#elif defined(TTP244M_PCB)
PFC.PEIOR.WORD = 0x34B5; // 0011 0100 1011 0101
PE.DR.WORD = 0xCB5F;
#endif
/*-----------------------------------------------------------------------
Port F dircection function mode Dir/Init
BIT7 <- Gap sensor (F0) (I x)
BIT6 <- Bline sensor (F0) (I x)
BIT5 <- Ribbon end sensor (F0) (I x)
BIT4 <- Peel sensor (F0) (I x)
BIT3 <- Cutter Curren|CT_SENS (F0) (I x)
BIT2 <- Version (F0) (I x)
BIT1 <- Temperature A/D (F0) (I x)
BIT0 <- Voltage A/D|KEY1 (F0) (I x)
--------------------------------------------------------------------------*/
// Initial I/O port -- End
}
#elif defined(TTP245_PCB) || defined(TTP246M_PCB)
VOID InitialIO(VOID)
{
INTC.ICR.BIT.NMIE = 1; // close NMI, 0 : falling edge, 1 : rising edge
// Initial I/O port -- Start
// F3-C F2-8 F1-4 F0-0
// F3-3 F2-2 F1-1 F0-0
/*-----------------------------------------------------------------------
Port A dircection function mode Dir/Init
BIT15 -> /TPH Latch (F0-0 I/O ) (O 1)
BIT14 -> /RD (F1-1 /RD ) (O x)
BIT13 -> /WRH (F1-4 /WRH ) (O x)
BIT12 -> /WRL (F1-1 /WRL ) (O x)
BIT11 -> /CS1 (F1-4 /CS1 ) (O x)
BIT10 -> /CS0 (F1-1 /CS0 ) (O x)
BIT9 <- USB (IRQ3) (F2-8 /IRQ3 ) (I x)
BIT8 <- cen2 strobe (IRQ2) (F2-2 /IRQ2 ) (I x)
BIT7 -> /CS3 (F2-8 /CS3 ) (O x)
BIT6 -> /CS2 (F2-2 /CS2 ) (O x)
BIT5 -> TPH CLK (F1-4 SCK1 ) (O x)
BIT4 -> TPH Data (F1-1 TxD1 ) (O x)
BIT3 -> RS232 CTS (F0-0 I/O ) (O 1)
BIT2 <- /Centronic Strobe (F0-0 I/O ) (I x)
BIT1 -> RS232 TxD (F1-4 TxD0 ) (O x)
BIT0 <- RS232 RxD (F1-1 RxD0 ) (I x)
--------------------------------------------------------------------------*/
// 00 01 01 01 01 01 10 00
PFC.PACRL1.WORD = 0x1558;
#if defined(TTP246M_PCB)
// 10 10 01 01 00 00 01 01
PFC.PACRL2.WORD = 0xA505;
#else
// 10 10 01 01 00 11 01 01
PFC.PACRL2.WORD = 0xA535;
#endif
// 11 11 11 00 11 11 10 10
PFC.PAIORL.WORD = 0xFCFA;
PA.DR.WORD.L = 0xFFFF;
/*-----------------------------------------------------------------------
Port B dircection function mode Dir/Init
BIT9 -> A21 (F2-8 A21 ) (O x)
BIT8 -> A20 (F2-2 A20 ) (O x)
BIT7 -> A19 (F2-8 A19 ) (O x)
BIT6 -> A18 (F2-2 A18 ) (O x)
BIT5 -> RDWR (F3-C RDWR ) (O x)
BIT4 -> /CASH (F3-3 /CASH ) (O x)
BIT3 -> /CASL (F3-C /CASL ) (O x)
BIT2 -> /RAS (F3-3 /RAS ) (O x)
BIT1 -> A17 (F1-4 A17 ) (O x)
BIT0 -> A16 (F1-1 A16 ) (O x)
--------------------------------------------------------------------------*/
// 00 00 00 00 00 00 10 10
PFC.PBCR1.WORD = 0x000A;
// 10 10 11 11 11 11 01 01
PFC.PBCR2.WORD = 0xAFF5;
PFC.PBIOR.WORD = 0xFFFF;
/*-----------------------------------------------------------------------
Port C dircection function mode Dir/Init
BIT15 -> A15 (F1-8 A15 ) (O x)
BIT14 -> A14 (F1-4 A14 ) (O x)
BIT13 -> A13 (F1-2 A13 ) (O x)
BIT12 -> A12 (F1-1 A12 ) (O x)
BIT11 -> A11 (F1-8 A11 ) (O x)
BIT10 -> A10 (F1-4 A10 ) (O x)
BIT9 -> A9 (F1-2 A9 ) (O x)
BIT8 -> A8 (F1-1 A8 ) (O x)
BIT7 -> A7 (F1-8 A7 ) (O x)
BIT6 -> A6 (F1-4 A6 ) (O x)
BIT5 -> A5 (F1-2 A5 ) (O x)
BIT4 -> A4 (F1-1 A4 ) (O x)
BIT3 -> A3 (F1-8 A3 ) (O x)
BIT2 -> A2 (F1-4 A2 ) (O x)
BIT1 -> A1 (F1-2 A1 ) (O x)
BIT0 -> A0 (F1-1 A0 ) (O x)
--------------------------------------------------------------------------*/
PFC.PCCR.WORD = 0xFFFF;
PFC.PCIOR.WORD = 0xFFFF;
/*-----------------------------------------------------------------------
Port D dircection function mode Dir/Init
BIT15 <-> D15 (F1-8 D15 ) (I/O)
BIT14 <-> D14 (F1-4 D14 ) (I/O)
BIT13 <-> D13 (F1-2 D13 ) (I/O)
BIT12 <-> D12 (F1-1 D12 ) (I/O)
BIT11 <-> D11 (F1-8 D11 ) (I/O)
BIT10 <-> D10 (F1-4 D10 ) (I/O)
BIT9 <-> D9 (F1-2 D9 ) (I/O)
BIT8 <-> D8 (F1-1 D8 ) (I/O)
BIT7 <-> D7 (F1-8 D7 ) (I/O)
BIT6 <-> D6 (F1-4 D6 ) (I/O)
BIT5 <-> D5 (F1-2 D5 ) (I/O)
BIT4 <-> D4 (F1-1 D4 ) (I/O)
BIT3 <-> D3 (F1-8 D3 ) (I/O)
BIT2 <-> D2 (F1-4 D2 ) (I/O)
BIT1 <-> D1 (F1-2 D1 ) (I/O)
BIT0 <-> D0 (F1-1 D0 ) (I/O)
--------------------------------------------------------------------------*/
PFC.PDCRL.WORD = 0xFFFF;
PFC.PDIORL.WORD = 0xFFFF;
/*-----------------------------------------------------------------------
Port E dircection function mode Dir/Init
BIT15 <- Head Sensor (F0-0 I/O ) (I x)
BIT14 <- /Key1 (Feed) (F0-0 I/O ) (I x)
BIT13 <- /Key2 (Pause) (F0-0 I/O ) (I x)
BIT12 -> Buzzer (F1-1 TIOC4A) (O x)
BIT11 -> EEPROM SK (F0-0 I/O ) (0 0)
BIT10 -> EEPROM CS (F0-0 I/O ) (O 0)
BIT9 <-> EEPROM Data (F0-0 I/O ) (I x)
BIT8 <- Paper Near End (F1-1 TIOC3A) (I x)
BIT7 -> /LED3 (F0-0 I/O ) (O 0)
BIT6 <- Ribbon Near End (F1-1 TIOC2A) (I x)
BIT5 -> /LED2 (F0-0 I/O ) (O 0)
BIT4 <- /Key3 (Menu) (F0-0 I/O ) (I x)
BIT3 -> TPH Enable (F0-0 I/O ) (0 0)
BIT2 -> /LED1 (F0-0 I/O ) (O 0)
BIT1 -> TPH Strobe 1 (F0-0 I/O ) (O 0)
BIT0 -> TPH Strobe 2 (F0-0 I/O ) (O 0)
--------------------------------------------------------------------------*/
#if defined(TTP246M_PCB)
PFC.PECR1.WORD = 0x0001;
PFC.PECR2.WORD = 0x1000;
PFC.PEIOR.WORD = 0x0CAF;
#else
PFC.PECR1.WORD = 0x2001;
PFC.PECR2.WORD = 0x0002; // BIT6 : (F0-0 I/O)(O 1) , Set (F1-1 TIOC2A) in Initial()
PFC.PEIOR.WORD = 0x4CF8;
#endif
PE.DR.WORD = 0xF350;
/*-----------------------------------------------------------------------
Port F dircection function mode Dir/Init
BIT7 <- Gap sensor (F0) (I x)
BIT6 <- Bline sensor (F0) (I x)
BIT5 <- Ribbon end sensor (F0) (I x)
BIT4 <- Peel sensor (F0) (I x)
BIT3 <- Cuuter Curren (F0) (I x)
BIT2 <- Version (F0) (I x)
BIT1 <- Temperature A/D (F0) (I x)
BIT0 <- Voltage A/D (F0) (I x)
--------------------------------------------------------------------------*/
// Initial I/O port -- End
}
#endif
/******************************************************************************
*
* Function:
* InitialBUS
*
* Description:
* This global function initializes the CPU Bus.
*
* Input:
* None
*
* Output:
* None.
*
******************************************************************************/
VOID InitialBUS(VOID)
{
// Initial Bus
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
// CS0: 16 bit , CS1: 8 bit , CS2: 16 bit , CS3: 8 bit
BSC.BCR1.WORD = 0x2005;
#elif defined(TTP245_PCB) || defined(TTP246M_PCB)
// CS0: 16 bit , CS1: 16 bit , CS2: 16 bit , CS3: 8 bit
BSC.BCR1.WORD = 0x2007;
#endif
BSC.BCR2.WORD = 0xC08F; // C08F : CS3 I3 C1, CS2-0 I0 C0 // D58F : CS3 I3 C1, CS2-0 I1 C0
BSC.WCR1.WORD = 0xE222; // F111 : CS3 W1 , CS2-0 W1
BSC.WCR2.WORD = 0x0001;
// Initial DRAM
BSC.DCR.WORD = 0x0005;
BSC.RTCSR.WORD = 0x0046;
BSC.RTCNT = 0;
BSC.RTCOR = 218;
}
/******************************************************************************
*
* Function:
* InitialCCR
*
* Description:
* This global function initializes cache mamory.
*
* Input:
* None
*
* Output:
* None.
*
******************************************************************************/
VOID InitialCCR(VOID)
{
VOLATILE INT *p;
INT i;
// Initialize address tags of cache KChou 0502-03
p = CACHE_MEMORY_ADDR;
for ( i = 0 ; i < CACHE_MEMORY_LEN_INT ; i++ )
*(p+i) = 0;
// Enable Cache
CCR.WORD = 0x0017;
}
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
/******************************************************************************
*
* Function:
* InitialExtIO
*
* Description:
* This global function initializes extend IO.
*
* Input:
* None
*
* Output:
* None.
*
******************************************************************************/
VOID InitialExtIO(VOID)
{
/*-----------------------------------------------------------------------
Ext Port A dircection function mode Dir/Init
BIT7 -> BUZZER ( I/O ) (O 1)
BIT6 -> TPH Enable ( I/O ) (O 0)
BIT5 -> DC PHASE ( I/O ) (O 1)
BIT4 -> /CT Enable ( I/O ) (O 1)
BIT3 -> Step Motor I0 ( I/O ) (O 1)
BIT2 -> Step Motor I1 ( I/O ) (O 1)
BIT1 -> Step Motor Phase2 ( I/O ) (O 1)
BIT0 -> Step Motor Phase1 ( I/O ) (O 1)
--------------------------------------------------------------------------*/
OutPort(EXT_IOPORT_01, 0xBF);
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
PORTA_PROTECT = LOW; // Enable ext. IO PortA
#endif
/*-----------------------------------------------------------------------
Ext Port B dircection function mode Dir/Init
BIT7 -> RTC_CLOCK|None ( I/O ) (O 1)
BIT6 -> /RTC_RST|None ( I/O ) (O 0)
BIT5 -> /Centonics Error ( I/O ) (O 1)
BIT4 -> /Centonics Select ( I/O ) (O 1)
BIT3 -> /Centonics PE ( I/O ) (O 0)
BIT2 -> LED3|None ( I/O ) (O 1)
BIT1 -> LED2|None ( I/O ) (O 1)
BIT0 -> LED1|None ( I/O ) (O 1)
--------------------------------------------------------------------------*/
OutPort(EXT_IOPORT_02, 0xB7);
}
#elif defined(TTP245_PCB) || defined(TTP246M_PCB)
/******************************************************************************
*
* Function:
* InitialExtIO
*
* Description:
* This global function initializes extend IO.
*
* Input:
* None
*
* Output:
* None.
*
******************************************************************************/
VOID InitialExtIO(VOID)
{
// motor
OutPort(EXT_IOPORT_04, 0xFF);
OutPort(EXT_IOPORT_15, 0);
OutPort(EXT_IOPORT_16, 0);
}
#endif
hwsetup.h 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
#ifndef HwSetup_h
/******************************************************************************
* *
* M O D U L E D E F I N E *
* *
******************************************************************************/
#define HwSetup_h
/******************************************************************************
* *
* C O M P I L E R D E F I N E D I N C L U D E F I L E S *
* *
******************************************************************************/
/******************************************************************************
* *
* U S E R D E F I N E D I N C L U D E F I L E S *
* *
******************************************************************************/
#ifdef __cplusplus
extern "C" { /* Assume C declarations for C++ */
#endif /* __cplusplus */
/******************************************************************************
* *
* G L O B A L D E F I N E S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* S T R U C T U R E D E F I N I T I O N S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* G L O B A L V A R I A B L E S - N O I N I T I A L I Z E R S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* G L O B A L V A R I A B L E S - I N I T I A L I Z E R S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* F U N C T I O N P R O T O T Y P E S *
* *
******************************************************************************/
void InitialIO(void);
void InitialBUS(void);
void InitialCCR(void);
void InitialExtIO(void);
void InitialExtPort(void);
void TestGpio(void);
#ifdef __cplusplus
} /* End of extern "C" { */
#endif /* __cplusplus */
#endif
intprg.c 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :intprg.c */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Interrupt Program */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
#include "Common.h"
#include "XBuzzer.h"
#include "XPS2.h"
#include "XComm.h"
#include "XPrtEng.h"
#include "XTimer.h"
#include "XTask.h"
#include "XVarBank.h"
#include "vect.h"
#pragma section IntPRG
// 4 Illegal code
void INT_Illegal_code(void){/* sleep(); */}
// 5 Reserved
// 6 Illegal slot
void INT_Illegal_slot(void){/* sleep(); */}
// 7 Reserved
// 8 Reserved
// 9 CPU Address error
void INT_CPU_Address(void){/* sleep(); */}
// 10 DMAC Address error
void INT_DMAC_Address(void){/* sleep(); */}
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
// 11 NMI
void INT_NMI(void){/* sleep(); */}
#elif defined(TTP245_PCB) || defined(TTP246M_PCB)
// 11 NMI
void INT_NMI(void){PowerDownISR();}
#endif
// 12 User breakpoint trap
void INT_User_Break(void){/* sleep(); */}
// 13 Reserved
// 14 Reserved
// 15 Reserved
// 16 Reserved
// 17 Reserved
// 18 Reserved
// 19 Reserved
// 20 Reserved
// 21 Reserved
// 22 Reserved
// 23 Reserved
// 24 Reserved
// 25 Reserved
// 26 Reserved
// 27 Reserved
// 28 Reserved
// 29 Reserved
// 30 Reserved
// 31 Reserved
// 32 TRAPA (User Vecter)
void INT_TRAPA32(void){/* sleep(); */}
// 33 TRAPA (User Vecter)
void INT_TRAPA33(void){/* sleep(); */}
// 34 TRAPA (User Vecter)
void INT_TRAPA34(void){/* sleep(); */}
// 35 TRAPA (User Vecter)
void INT_TRAPA35(void){/* sleep(); */}
// 36 TRAPA (User Vecter)
void INT_TRAPA36(void){/* sleep(); */}
// 37 TRAPA (User Vecter)
void INT_TRAPA37(void){/* sleep(); */}
// 38 TRAPA (User Vecter)
void INT_TRAPA38(void){/* sleep(); */}
// 39 TRAPA (User Vecter)
void INT_TRAPA39(void){/* sleep(); */}
// 40 TRAPA (User Vecter)
void INT_TRAPA40(void){/* sleep(); */}
// 41 TRAPA (User Vecter)
void INT_TRAPA41(void){/* sleep(); */}
// 42 TRAPA (User Vecter)
void INT_TRAPA42(void){/* sleep(); */}
// 43 TRAPA (User Vecter)
void INT_TRAPA43(void){/* sleep(); */}
// 44 TRAPA (User Vecter)
void INT_TRAPA44(void){/* sleep(); */}
// 45 TRAPA (User Vecter)
void INT_TRAPA45(void){/* sleep(); */}
// 46 TRAPA (User Vecter)
void INT_TRAPA46(void){/* sleep(); */}
// 47 TRAPA (User Vecter)
void INT_TRAPA47(void){/* sleep(); */}
// 48 TRAPA (User Vecter)
void INT_TRAPA48(void){/* sleep(); */}
// 49 TRAPA (User Vecter)
void INT_TRAPA49(void){/* sleep(); */}
// 50 TRAPA (User Vecter)
void INT_TRAPA50(void){/* sleep(); */}
// 51 TRAPA (User Vecter)
void INT_TRAPA51(void){/* sleep(); */}
// 52 TRAPA (User Vecter)
void INT_TRAPA52(void){/* sleep(); */}
// 53 TRAPA (User Vecter)
void INT_TRAPA53(void){/* sleep(); */}
// 54 TRAPA (User Vecter)
void INT_TRAPA54(void){/* sleep(); */}
// 55 TRAPA (User Vecter)
void INT_TRAPA55(void){/* sleep(); */}
// 56 TRAPA (User Vecter)
void INT_TRAPA56(void){/* sleep(); */}
// 57 TRAPA (User Vecter)
void INT_TRAPA57(void){/* sleep(); */}
// 58 TRAPA (User Vecter)
void INT_TRAPA58(void){/* sleep(); */}
// 59 TRAPA (User Vecter)
void INT_TRAPA59(void){/* sleep(); */}
// 60 TRAPA (User Vecter)
void INT_TRAPA60(void){/* sleep(); */}
// 61 TRAPA (User Vecter)
void INT_TRAPA61(void){/* sleep(); */}
// 62 TRAPA (User Vecter)
void INT_TRAPA62(void){/* sleep(); */}
// 63 TRAPA (User Vecter)
void INT_TRAPA63(void){/* sleep(); */}
#if defined(TTP246M_PCB)
// 64 Interrupt IRQ0
void INT_IRQ0(void){PS2ISR();}
#else
// 64 Interrupt IRQ0
void INT_IRQ0(void){/* sleep(); */}
#endif
// 65 Interrupt IRQ1
void INT_IRQ1(void){/* sleep(); */}
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
// 66 Interrupt IRQ2
void INT_IRQ2(void){PowerDownISR();}
#elif defined(TTP245_PCB) || defined(TTP246M_PCB)
// 66 Interrupt IRQ2
void INT_IRQ2(void){/* sleep(); */}
#endif
// 67 Interrupt IRQ3
void INT_IRQ3(void){UsbISR();}
// 68 Interrupt IRQ4
void INT_IRQ4(void){/* sleep(); */}
// 69 Interrupt IRQ5
void INT_IRQ5(void){/* sleep(); */}
// 70 Interrupt IRQ6
void INT_IRQ6(void){/* sleep(); */}
// 71 Interrupt IRQ7
void INT_IRQ7(void){/* sleep(); */}
// 72 DMAC0 DEI0
void INT_DMAC0_DEI0(void){/* sleep(); */}
// 73 Reserved
// 74 Reserved
// 75 Reserved
// 76 DMAC1 DEI1
void INT_DMAC1_DEI1(void){/* sleep(); */}
// 77 Reserved
// 78 Reserved
// 79 Reserved
// 80 DMAC3 DEI2
void INT_DMAC3_DEI2(void){TPHTransmitISR();}
// 81 Reserved
// 82 Reserved
// 83 Reserved
// 84 DMAC3 DEI3
void INT_DMAC3_DEI3(void){/* sleep(); */}
// 85 ReservedB
// 86 Reserved
// 87 Reserved
// 88 MTU0 TGI0A
void INT_MTU0_TGI0A(void){/* sleep(); */}
// 89 MTU0 TGI0B
void INT_MTU0_TGI0B(void){/* sleep(); */}
// 90 MTU0 TGI0C
void INT_MTU0_TGI0C(void){/* sleep(); */}
// 91 MTU0 TGI0D
void INT_MTU0_TGI0D(void){/* sleep(); */}
// 92 MTU0 TCI0V
void INT_MTU0_TCI0V(void){/* sleep(); */}
// 93 Reserved
// 94 Reserved
// 95 Reserved
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
// 96 MTU1 TGI1A
void INT_MTU1_TGI1A(void){/* sleep(); */}
// 97 MTU1 TGI1B
void INT_MTU1_TGI1B(void){/* sleep(); */}
// 98 Reserved
// 99 Reserved
// 100 MTU1 TCI1V
void INT_MTU1_TCI1V(void){/* sleep(); */}
// 101 MTU1 TCI1U
void INT_MTU1_TCI1U(void){/* sleep(); */}
#elif defined(TTP245_PCB) || defined(TTP246M_PCB)
// 96 MTU1 TGI1A
void INT_MTU1_TGI1A(void){BuzzerTimerISR();}
// 97 MTU1 TGI1B
void INT_MTU1_TGI1B(void){/* sleep(); */}
// 98 Reserved
// 99 Reserved
// 100 MTU1 TCI1V
void INT_MTU1_TCI1V(void){TaskISR();}
// 101 MTU1 TCI1U
void INT_MTU1_TCI1U(void){/* sleep(); */}
#endif
// 102 Reserved
// 103 Reserved
// 104 MTU2 TGI2A
void INT_MTU2_TGI2A(void){/* sleep(); */}
// 105 MTU2 TGI2B
void INT_MTU2_TGI2B(void){/* sleep(); */}
// 106 Reserved
// 107 Reserved
// 108 MTU2 TCI2V
void INT_MTU2_TCI2V(void){/* sleep(); */}
// 109 MTU2 TCI2U
void INT_MTU2_TCI2U(void){/* sleep(); */}
// 110 Reserved
// 111 Reserved
#if defined(TTP243_PCB) || defined(TDP643_PCB) || defined(TTP244M_PCB)
// 112 MTU3 TGI3A
void INT_MTU3_TGI3A(void){BuzzerTimerISR();}
// 113 MTU3 TGI3B
void INT_MTU3_TGI3B(void){/* sleep(); */}
// 114 MTU3 TGI3C
void INT_MTU3_TGI3C(void){/* sleep(); */}
// 115 MTU3 TGI3D
void INT_MTU3_TGI3D(void){/* sleep(); */}
// 116 MTU3 TCI3V
void INT_MTU3_TCI3V(void){TaskISR();}
#elif defined(TTP245_PCB) || defined(TTP246M_PCB)
// 112 MTU3 TGI3A
void INT_MTU3_TGI3A(void){/* sleep(); */}
// 113 MTU3 TGI3B
void INT_MTU3_TGI3B(void){/* sleep(); */}
// 114 MTU3 TGI3C
void INT_MTU3_TGI3C(void){/* sleep(); */}
// 115 MTU3 TGI3D
void INT_MTU3_TGI3D(void){/* sleep(); */}
// 116 MTU3 TCI3V
void INT_MTU3_TCI3V(void){/* sleep(); */}
#endif
// 117 Reserved
// 118 Reserved
// 119 Reserved
// 120 MTU4 TGI4A
void INT_MTU4_TGI4A(void){MotorCtrlISR();}
// 121 MTU4 TGI4B
void INT_MTU4_TGI4B(void){MotionISR();}
// 122 MTU4 TGI4C
void INT_MTU4_TGI4C(void){/* sleep(); */}
// 123 MTU4 TGI4D
void INT_MTU4_TGI4D(void){/* sleep(); */}
// 124 MTU4 TCI4V
void INT_MTU4_TCI4V(void){/* sleep(); */}
// 125 Reserved
// 126 Reserved
// 127 Reserved
// 128 SCI0 ERI0
void INT_SCI0_ERI0(void){UartErrorISR();}
// 129 SCI0 RXI0
void INT_SCI0_RXI0(void){UartReceiveISR();}
// 130 SCI0 TXI0
void INT_SCI0_TXI0(void){UartTransmitISR();}
// 131 SCI0 TEI0
void INT_SCI0_TEI0(void){/* sleep(); */}
// 132 SCI1 ERI1
void INT_SCI1_ERI1(void){/* sleep(); */}
// 133 SCI1 RXI1
void INT_SCI1_RXI1(void){/* sleep(); */}
// 134 SCI1 TXI1
void INT_SCI1_TXI1(void){/* sleep(); */}
// 135 SCI1 TEI1
void INT_SCI1_TEI1(void){/* sleep(); */}
// 136 A/D ADI0
void INT_ADI0(void){/* sleep(); */}
// 137 A/D ADI0
void INT_ADI1(void){/* sleep(); */}
// 138 Reserved
// 139 Reserved
// 140 DTC SWDTCE
void INT_DTC_SWDTCE(void){/* sleep(); */}
// 141 Reserved
// 142 Reserved
// 143 Reserved
// 144 CMT0 CMI0
void INT_CMT0_CMI0(void){SysTimerISR();}
// 145 Reserved
// 146 Reserved
// 147 Reserved
// 148 CMT1 CMI1
void INT_CMT1_CMI1(void){HeatTimerISR();}
// 149 Reserved
// 150 Reserved
// 151 Reserved
// 152 WDT ITI
void INT_WDT_ITI(void){/* sleep(); */}
// 153 BSC CMI
void INT_BSC_CMI(void){/* sleep(); */}
// 154 Reserved
// 155 Reserved
// 156 I/O OEI
void INT_OEI(void){/* sleep(); */}
// 157 Reserved
// 158 Reserved
// 159 Reserved
// 160 Reserved
// 161 Reserved
// 162 Reserved
// 163 Reserved
// 164 Reserved
// 165 Reserved
// 166 Reserved
// 167 Reserved
// 168 Reserved
// 169 Reserved
// 170 Reserved
// 171 Reserved
// 172 Reserved
// 173 Reserved
// 174 Reserved
// 175 Reserved
// 176 Reserved
// 177 Reserved
// 178 Reserved
// 179 Reserved
// 180 Reserved
// 181 Reserved
// 182 Reserved
// 183 Reserved
// 184 Reserved
// 185 Reserved
// 186 Reserved
// 187 Reserved
// 188 Reserved
// 189 Reserved
// 190 Reserved
// 191 Reserved
// 192 Reserved
// 193 Reserved
// 194 Reserved
// 195 Reserved
// 196 Reserved
// 197 Reserved
// 198 Reserved
// 199 Reserved
// 200 Reserved
// 201 Reserved
// 202 Reserved
// 203 Reserved
// 204 Reserved
// 205 Reserved
// 206 Reserved
// 207 Reserved
// 208 Reserved
// 209 Reserved
// 210 Reserved
// 211 Reserved
// 212 Reserved
// 213 Reserved
// 214 Reserved
// 215 Reserved
// 216 Reserved
// 217 Reserved
// 218 Reserved
// 219 Reserved
// 220 Reserved
// 221 Reserved
// 222 Reserved
// 223 Reserved
// 224 Reserved
// 225 Reserved
// 226 Reserved
// 227 Reserved
// 228 Reserved
// 229 Reserved
// 230 Reserved
// 231 Reserved
// 232 Reserved
// 233 Reserved
// 234 Reserved
// 235 Reserved
// 236 Reserved
// 237 Reserved
// 238 Reserved
// 239 Reserved
// 240 Reserved
// 241 Reserved
// 242 Reserved
// 243 Reserved
// 244 Reserved
// 245 Reserved
// 246 Reserved
// 247 Reserved
// 248 Reserved
// 249 Reserved
// 250 Reserved
// 251 Reserved
// 252 Reserved
// 253 Reserved
// 254 Reserved
// 255 Reserved
// Dummy
void Dummy(void){/* sleep(); */}
iodefine.h 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :iodefine.h */
/* DATE :Thu, Sep 15, 2005 */
/* DESCRIPTION :Definition of I/O Register */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
#ifndef IoDefine_h
#define IoDefine_h
/************************************************************************/
/* SH7040 Series Include File Ver 2.0 */
/************************************************************************/
struct st_sci { /* struct SCI */
union { /* SMR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char CA :1; /* C/A */
unsigned char CHR :1; /* CHR */
unsigned char _PE :1; /* PE */
unsigned char OE :1; /* O/E */
unsigned char STOP:1; /* STOP */
unsigned char MP :1; /* MP */
unsigned char CKS :2; /* CKS */
} BIT; /* */
} SMR; /* */
unsigned char BRR; /* BRR */
union { /* SCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TIE :1; /* TIE */
unsigned char RIE :1; /* RIE */
unsigned char TE :1; /* TE */
unsigned char RE :1; /* RE */
unsigned char MPIE:1; /* MPIE */
unsigned char TEIE:1; /* TEIE */
unsigned char CKE :2; /* CKE */
} BIT; /* */
} SCR; /* */
unsigned char TDR; /* TDR */
union { /* SSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TDRE:1; /* TDRE */
unsigned char RDRF:1; /* RDRF */
unsigned char ORER:1; /* ORER */
unsigned char FER :1; /* FER */
unsigned char PER :1; /* PER */
unsigned char TEND:1; /* TEND */
unsigned char MPB :1; /* MPB */
unsigned char MPBT:1; /* MPBT */
} BIT; /* */
} SSR; /* */
unsigned char RDR; /* RDR */
}; /* */
struct st_mtu { /* struct MTU */
union { /* TOER */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :2; /* */
unsigned char OE4D:1; /* OE4D */
unsigned char OE4C:1; /* OE4C */
unsigned char OE3D:1; /* OE3D */
unsigned char OE4B:1; /* OE4B */
unsigned char OE4A:1; /* OE4A */
unsigned char OE3B:1; /* OE3B */
} BIT; /* */
} TOER; /* */
union { /* TOCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :1; /* */
unsigned char PSYE:1; /* PSYE */
unsigned char :4; /* */
unsigned char OLSN:1; /* OLSN */
unsigned char OLSP:1; /* OLSP */
} BIT; /* */
} TOCR; /* */
char wk1; /* */
union { /* TGCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :1; /* */
unsigned char BDC:1; /* BDC */
unsigned char N :1; /* N */
unsigned char P :1; /* P */
unsigned char FB :1; /* FB */
unsigned char WF :1; /* WF */
unsigned char VF :1; /* VF */
unsigned char UF :1; /* UF */
} BIT; /* */
} TGCR; /* */
char wk2[6]; /* */
unsigned short TCDR; /* TCDR */
unsigned short TDDR; /* TDDR */
char wk3[8]; /* */
unsigned short TCNTS; /* TCNTS */
unsigned short TCBR; /* TCBR */
char wk4[28]; /* */
union { /* TSTR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char CST4:1; /* CST4 */
unsigned char CST3:1; /* CST3 */
unsigned char :3; /* */
unsigned char CST2:1; /* CST2 */
unsigned char CST1:1; /* CST1 */
unsigned char CST0:1; /* CST0 */
} BIT; /* */
} TSTR; /* */
union { /* TSYR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char SYNC4:1; /* SYNC4 */
unsigned char SYNC3:1; /* SYNC3 */
unsigned char :3; /* */
unsigned char SYNC2:1; /* SYNC2 */
unsigned char SYNC1:1; /* SYNC1 */
unsigned char SYNC0:1; /* SYNC0 */
} BIT; /* */
} TSYR; /* */
}; /* */
struct st_mtu0 { /* struct MTU0 */
union { /* TCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char CCLR:3; /* CCLR */
unsigned char CKEG:2; /* CKEG */
unsigned char TPSC:3; /* TPSC */
} BIT; /* */
} TCR; /* */
union { /* TMDR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :2; /* */
unsigned char BFB:1; /* BFB */
unsigned char BFA:1; /* BFA */
unsigned char MD :4; /* MD */
} BIT; /* */
} TMDR; /* */
union { /* TIOR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* TIORH */
unsigned char L; /* TIORL */
} BYTE; /* */
struct { /* Bit Access */
unsigned char IOB:4; /* IOB */
unsigned char IOA:4; /* IOA */
unsigned char IOD:4; /* IOD */
unsigned char IOC:4; /* IOC */
} BIT; /* */
} TIOR; /* */
union { /* TIER */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TTGE :1; /* TTGE */
unsigned char :2; /* */
unsigned char TCIEV:1; /* TCIEV */
unsigned char TGIED:1; /* TGIED */
unsigned char TGIEC:1; /* TGIEC */
unsigned char TGIEB:1; /* TGIEB */
unsigned char TGIEA:1; /* TGIEA */
} BIT; /* */
} TIER; /* */
union { /* TSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :3; /* */
unsigned char TCFV:1; /* TCFV */
unsigned char TGFD:1; /* TGFD */
unsigned char TGFC:1; /* TGFC */
unsigned char TGFB:1; /* TGFB */
unsigned char TGFA:1; /* TGFA */
} BIT; /* */
} TSR; /* */
unsigned short TCNT; /* TCNT */
unsigned short TGRA; /* TGRA */
unsigned short TGRB; /* TGRB */
unsigned short TGRC; /* TGRC */
unsigned short TGRD; /* TGRD */
}; /* */
struct st_mtu1 { /* struct MTU1 */
union { /* TCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :1; /* */
unsigned char CCLR:2; /* CCLR */
unsigned char CKEG:2; /* CKEG */
unsigned char TPSC:3; /* TPSC */
} BIT; /* */
} TCR; /* */
union { /* TMDR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :4; /* */
unsigned char MD:4; /* MD */
} BIT; /* */
} TMDR; /* */
union { /* TIOR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char IOB:4; /* IOB */
unsigned char IOA:4; /* IOA */
} BIT; /* */
} TIOR; /* */
char wk; /* */
union { /* TIER */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TTGE :1; /* TTGE */
unsigned char :1; /* */
unsigned char TCIEU:1; /* TCIEU */
unsigned char TCIEV:1; /* TCIEV */
unsigned char :2; /* */
unsigned char TGIEB:1; /* TGIEB */
unsigned char TGIEA:1; /* TGIEA */
} BIT; /* */
} TIER; /* */
union { /* TSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TCFD:1; /* TCFD */
unsigned char :1; /* */
unsigned char TCFU:1; /* TCFU */
unsigned char TCFV:1; /* TCFV */
unsigned char :2; /* */
unsigned char TGFB:1; /* TGFB */
unsigned char TGFA:1; /* TGFA */
} BIT; /* */
} TSR; /* */
unsigned short TCNT; /* TCNT */
unsigned short TGRA; /* TGRA */
unsigned short TGRB; /* TGRB */
}; /* */
struct st_mtu3 { /* struct MTU3 */
union { /* TCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char CCLR:3; /* CCLR */
unsigned char CKEG:2; /* CKEG */
unsigned char TPSC:3; /* TPSC */
} BIT; /* */
} TCR; /* */
char wk1; /* */
union { /* TMDR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :2; /* */
unsigned char BFB:1; /* BFB */
unsigned char BFA:1; /* BFA */
unsigned char MD :4; /* MD */
} BIT; /* */
} TMDR; /* */
char wk2; /* */
union { /* TIOR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* TIORH */
unsigned char L; /* TIORL */
} BYTE; /* */
struct { /* Bit Access */
unsigned char IOB:4; /* IOB */
unsigned char IOA:4; /* IOA */
unsigned char IOD:4; /* IOD */
unsigned char IOC:4; /* IOC */
} BIT; /* */
} TIOR; /* */
char wk3[2]; /* */
union { /* TIER */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TTGE :1; /* TTGE */
unsigned char :2; /* */
unsigned char TCIEV:1; /* TCIEV */
unsigned char TGIED:1; /* TGIED */
unsigned char TGIEC:1; /* TGIEC */
unsigned char TGIEB:1; /* TGIEB */
unsigned char TGIEA:1; /* TGIEA */
} BIT; /* */
} TIER; /* */
char wk4[7]; /* */
unsigned short TCNT; /* TCNT */
char wk5[6]; /* */
unsigned short TGRA; /* TGRA */
unsigned short TGRB; /* TGRB */
char wk6[8]; /* */
unsigned short TGRC; /* TGRC */
unsigned short TGRD; /* TGRD */
char wk7[4]; /* */
union { /* TSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TCFD:1; /* TCFD */
unsigned char :2; /* */
unsigned char TCFV:1; /* TCFV */
unsigned char TGFD:1; /* TGFD */
unsigned char TGFC:1; /* TGFC */
unsigned char TGFB:1; /* TGFB */
unsigned char TGFA:1; /* TGFA */
} BIT; /* */
} TSR; /* */
}; /* */
struct st_mtu4 { /* struct MTU4 */
char wk1; /* */
union { /* TCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char CCLR:3; /* CCLR */
unsigned char CKEG:2; /* CKEG */
unsigned char TPSC:3; /* TPSC */
} BIT; /* */
} TCR; /* */
char wk2; /* */
union { /* TMDR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :2; /* */
unsigned char BFB:1; /* BFB */
unsigned char BFA:1; /* BFA */
unsigned char MD :4; /* MD */
} BIT; /* */
} TMDR; /* */
char wk3[2]; /* */
union { /* TIOR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* TIORH */
unsigned char L; /* TIORL */
} BYTE; /* */
struct { /* Bit Access */
unsigned char IOB:4; /* IOB */
unsigned char IOA:4; /* IOA */
unsigned char IOD:4; /* IOD */
unsigned char IOC:4; /* IOC */
} BIT; /* */
} TIOR; /* */
char wk4; /* */
union { /* TIER */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TTGE :1; /* TTGE */
unsigned char :2; /* */
unsigned char TCIEV:1; /* TCIEV */
unsigned char TGIED:1; /* TGIED */
unsigned char TGIEC:1; /* TGIEC */
unsigned char TGIEB:1; /* TGIEB */
unsigned char TGIEA:1; /* TGIEA */
} BIT; /* */
} TIER; /* */
char wk5[8]; /* */
unsigned short TCNT; /* TCNT */
char wk6[8]; /* */
unsigned short TGRA; /* TGRA */
unsigned short TGRB; /* TGRB */
char wk7[8]; /* */
unsigned short TGRC; /* TGRC */
unsigned short TGRD; /* TGRD */
char wk8; /* */
union { /* TSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TCFD:1; /* TCFD */
unsigned char :2; /* */
unsigned char TCFV:1; /* TCFV */
unsigned char TGFD:1; /* TGFD */
unsigned char TGFC:1; /* TGFC */
unsigned char TGFB:1; /* TGFB */
unsigned char TGFA:1; /* TGFA */
} BIT; /* */
} TSR; /* */
}; /* */
struct st_poe { /* struct POE */
union { /* ICSR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char POE3F:1; /* POE3F */
unsigned char POE2F:1; /* POE2F */
unsigned char POE1F:1; /* POE1F */
unsigned char POE0F:1; /* POE0F */
unsigned char :3; /* */
unsigned char PIE :1; /* PIE */
unsigned char POE3M:2; /* POE3M */
unsigned char POE2M:2; /* POE2M */
unsigned char POE1M:2; /* POE1M */
unsigned char POE0M:2; /* POE0M */
} BIT; /* */
} ICSR; /* */
union { /* OCSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char OSF:1; /* OSF */
unsigned char :5; /* */
unsigned char OCE:1; /* OCE */
unsigned char OIE:1; /* OIE */
} BIT; /* */
} OCSR; /* */
}; /* */
struct st_intc { /* struct INTC */
union { /* IPRA */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _IRQ0:4; /* IRQ0 */
unsigned char _IRQ1:4; /* IRQ1 */
unsigned char _IRQ2:4; /* IRQ2 */
unsigned char _IRQ3:4; /* IRQ3 */
} BIT; /* */
} IPRA; /* */
union { /* IPRB */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _IRQ4:4; /* IRQ4 */
unsigned char _IRQ5:4; /* IRQ5 */
unsigned char _IRQ6:4; /* IRQ6 */
unsigned char _IRQ7:4; /* IRQ7 */
} BIT; /* */
} IPRB; /* */
union { /* IPRC */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _DMAC0:4; /* DMAC0 */
unsigned char _DMAC1:4; /* DMAC1 */
unsigned char _DMAC2:4; /* DMAC2 */
unsigned char _DMAC3:4; /* DMAC3 */
} BIT; /* */
} IPRC; /* */
union { /* IPRD */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _MTU0G:4; /* MTU0 TGI */
unsigned char _MTU0C:4; /* MTU0 TCI */
unsigned char _MTU1G:4; /* MTU1 TGI */
unsigned char _MTU1C:4; /* MTU1 TCI */
} BIT; /* */
} IPRD; /* */
union { /* IPRE */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _MTU2G:4; /* MTU2 TGI */
unsigned char _MTU2C:4; /* MTU2 TCI */
unsigned char _MTU3G:4; /* MTU3 TGI */
unsigned char _MTU3C:4; /* MTU3 TCI */
} BIT; /* */
} IPRE; /* */
union { /* IPRF */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _MTU4G:4; /* MTU4 TGI */
unsigned char _MTU4C:4; /* MTU4 TCI */
unsigned char _SCI0 :4; /* SCI0 */
unsigned char _SCI1 :4; /* SCI1 */
} BIT; /* */
} IPRF; /* */
union { /* IPRG */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _AD :4; /* A/D */
unsigned char _DTC :4; /* DTC */
unsigned char _CMT0:4; /* CMT0 */
unsigned char _CMT1:4; /* CMT1 */
} BIT; /* */
} IPRG; /* */
union { /* IPRH */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char _WDT:4; /* WDT,BSC */
unsigned char _IO :4; /* I/O */
} BIT; /* */
} IPRH; /* */
union { /* ICR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char NMIL :1; /* NMIL */
unsigned char :6; /* */
unsigned char NMIE :1; /* NMIE */
unsigned char IRQ0S:1; /* IRQ0S */
unsigned char IRQ1S:1; /* IRQ1S */
unsigned char IRQ2S:1; /* IRQ2S */
unsigned char IRQ3S:1; /* IRQ3S */
unsigned char IRQ4S:1; /* IRQ4S */
unsigned char IRQ5S:1; /* IRQ5S */
unsigned char IRQ6S:1; /* IRQ6S */
unsigned char IRQ7S:1; /* IRQ7S */
} BIT; /* */
} ICR; /* */
union { /* ISR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char IRQ0F:1; /* IRQ0F */
unsigned char IRQ1F:1; /* IRQ1F */
unsigned char IRQ2F:1; /* IRQ2F */
unsigned char IRQ3F:1; /* IRQ3F */
unsigned char IRQ4F:1; /* IRQ4F */
unsigned char IRQ5F:1; /* IRQ5F */
unsigned char IRQ6F:1; /* IRQ6F */
unsigned char IRQ7F:1; /* IRQ7F */
} BIT; /* */
} ISR; /* */
}; /* */
struct st_pa { /* struct PA */
union { /* PADR */
unsigned int LONG; /* Long Access */
struct { /* Word Access */
unsigned short H; /* High */
unsigned short L; /* Low */
} WORD; /* */
struct { /* Byte Access */
char wk; /* */
unsigned char HL; /* High,Low */
unsigned char LH; /* Low ,High */
unsigned char LL; /* Low ,Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char B23:1; /* Bit 23 */
unsigned char B22:1; /* Bit 22 */
unsigned char B21:1; /* Bit 21 */
unsigned char B20:1; /* Bit 20 */
unsigned char B19:1; /* Bit 19 */
unsigned char B18:1; /* Bit 18 */
unsigned char B17:1; /* Bit 17 */
unsigned char B16:1; /* Bit 16 */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} DR; /* */
}; /* */
struct st_pb { /* struct PB */
union { /* PBDR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :6; /* */
unsigned char B9:1; /* Bit 9 */
unsigned char B8:1; /* Bit 8 */
unsigned char B7:1; /* Bit 7 */
unsigned char B6:1; /* Bit 6 */
unsigned char B5:1; /* Bit 5 */
unsigned char B4:1; /* Bit 4 */
unsigned char B3:1; /* Bit 3 */
unsigned char B2:1; /* Bit 2 */
unsigned char B1:1; /* Bit 1 */
unsigned char B0:1; /* Bit 0 */
} BIT; /* */
} DR; /* */
}; /* */
struct st_pc { /* struct PC */
union { /* PCDR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} DR; /* */
}; /* */
struct st_pd { /* struct PD */
union { /* PDDR */
unsigned int LONG; /* Long Access */
struct { /* Word Access */
unsigned short H; /* High */
unsigned short L; /* Low */
} WORD; /* */
struct { /* Byte Access */
unsigned char HH; /* High,High */
unsigned char HL; /* High,Low */
unsigned char LH; /* Low ,High */
unsigned char LL; /* Low ,Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B31:1; /* Bit 31 */
unsigned char B30:1; /* Bit 30 */
unsigned char B29:1; /* Bit 29 */
unsigned char B28:1; /* Bit 28 */
unsigned char B27:1; /* Bit 27 */
unsigned char B26:1; /* Bit 26 */
unsigned char B25:1; /* Bit 25 */
unsigned char B24:1; /* Bit 24 */
unsigned char B23:1; /* Bit 23 */
unsigned char B22:1; /* Bit 22 */
unsigned char B21:1; /* Bit 21 */
unsigned char B20:1; /* Bit 20 */
unsigned char B19:1; /* Bit 19 */
unsigned char B18:1; /* Bit 18 */
unsigned char B17:1; /* Bit 17 */
unsigned char B16:1; /* Bit 16 */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} DR; /* */
}; /* */
struct st_pe { /* struct PE */
union { /* PEDR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} DR; /* */
}; /* */
struct st_pf { /* struct PF */
union { /* PFDR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char B7:1; /* Bit 7 */
unsigned char B6:1; /* Bit 6 */
unsigned char B5:1; /* Bit 5 */
unsigned char B4:1; /* Bit 4 */
unsigned char B3:1; /* Bit 3 */
unsigned char B2:1; /* Bit 2 */
unsigned char B1:1; /* Bit 1 */
unsigned char B0:1; /* Bit 0 */
} BIT; /* */
} DR; /* */
}; /* */
struct st_pfc { /* struct PFC */
union { /* PAIORH */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char B23:1; /* Bit 23 */
unsigned char B22:1; /* Bit 22 */
unsigned char B21:1; /* Bit 21 */
unsigned char B20:1; /* Bit 20 */
unsigned char B19:1; /* Bit 19 */
unsigned char B18:1; /* Bit 18 */
unsigned char B17:1; /* Bit 17 */
unsigned char B16:1; /* Bit 16 */
} BIT; /* */
} PAIORH; /* */
union { /* PAIORL */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} PAIORL; /* */
union { /* PACRH */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :1; /* */
unsigned char PA23MD:1; /* PA23MD */
unsigned char :1; /* */
unsigned char PA22MD:1; /* PA22MD */
unsigned char :1; /* */
unsigned char PA21MD:1; /* PA21MD */
unsigned char :1; /* */
unsigned char PA20MD:1; /* PA20MD */
unsigned char PA19MD:2; /* PA19MD */
unsigned char PA18MD:2; /* PA18MD */
unsigned char :1; /* */
unsigned char PA17MD:1; /* PA17MD */
unsigned char :1; /* */
unsigned char PA16MD:1; /* PA16MD */
} BIT; /* */
} PACRH; /* */
char wk1[2]; /* */
union { /* PACRL1 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :1; /* */
unsigned char PA15MD:1; /* PA15MD */
unsigned char :1; /* */
unsigned char PA14MD:1; /* PA14MD */
unsigned char :1; /* */
unsigned char PA13MD:1; /* PA13MD */
unsigned char :1; /* */
unsigned char PA12MD:1; /* PA12MD */
unsigned char :1; /* */
unsigned char PA11MD:1; /* PA11MD */
unsigned char :1; /* */
unsigned char PA10MD:1; /* PA10MD */
unsigned char PA9MD :2; /* PA9MD */
unsigned char PA8MD :2; /* PA8MD */
} BIT; /* */
} PACRL1; /* */
union { /* PACRL2 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char PA7MD:2; /* PA7MD */
unsigned char PA6MD:2; /* PA6MD */
unsigned char PA5MD:2; /* PA5MD */
unsigned char :1; /* */
unsigned char PA4MD:1; /* PA4MD */
unsigned char :1; /* */
unsigned char PA3MD:1; /* PA3MD */
unsigned char PA2MD:2; /* PA2MD */
unsigned char :1; /* */
unsigned char PA1MD:1; /* PA1MD */
unsigned char :1; /* */
unsigned char PA0MD:1; /* PA0MD */
} BIT; /* */
} PACRL2; /* */
char wk2[4]; /* */
union { /* PBIOR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :6; /* */
unsigned char B9:1; /* Bit 9 */
unsigned char B8:1; /* Bit 8 */
unsigned char B7:1; /* Bit 7 */
unsigned char B6:1; /* Bit 6 */
unsigned char B5:1; /* Bit 5 */
unsigned char B4:1; /* Bit 4 */
unsigned char B3:1; /* Bit 3 */
unsigned char B2:1; /* Bit 2 */
unsigned char B1:1; /* Bit 1 */
unsigned char B0:1; /* Bit 0 */
} BIT; /* */
} PBIOR; /* */
union { /* PCIOR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} PCIOR; /* */
union { /* PBCR1 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char :4; /* */
unsigned char PB9MD:2; /* PB9MD */
unsigned char PB8MD:2; /* PB8MD */
} BIT; /* */
} PBCR1; /* */
union { /* PBCR2 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char PB7MD:2; /* PB7MD */
unsigned char PB6MD:2; /* PB6MD */
unsigned char PB5MD:2; /* PB5MD */
unsigned char PB4MD:2; /* PB4MD */
unsigned char PB3MD:2; /* PB3MD */
unsigned char PB2MD:2; /* PB2MD */
unsigned char :1; /* */
unsigned char PB1MD:1; /* PB1MD */
unsigned char :1; /* */
unsigned char PB0MD:1; /* PB0MD */
} BIT; /* */
} PBCR2; /* */
union { /* PCCR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char PC15MD:1; /* PC15MD */
unsigned char PC14MD:1; /* PC14MD */
unsigned char PC13MD:1; /* PC13MD */
unsigned char PC12MD:1; /* PC12MD */
unsigned char PC11MD:1; /* PC11MD */
unsigned char PC10MD:1; /* PC10MD */
unsigned char PC9MD :1; /* PC9MD */
unsigned char PC8MD :1; /* PC8MD */
unsigned char PC7MD :1; /* PC7MD */
unsigned char PC6MD :1; /* PC6MD */
unsigned char PC5MD :1; /* PC5MD */
unsigned char PC4MD :1; /* PC4MD */
unsigned char PC3MD :1; /* PC3MD */
unsigned char PC2MD :1; /* PC2MD */
unsigned char PC1MD :1; /* PC1MD */
unsigned char PC0MD :1; /* PC0MD */
} BIT; /* */
} PCCR; /* */
char wk3[6]; /* */
union { /* PDIORH */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B31:1; /* Bit 31 */
unsigned char B30:1; /* Bit 30 */
unsigned char B29:1; /* Bit 29 */
unsigned char B28:1; /* Bit 28 */
unsigned char B27:1; /* Bit 27 */
unsigned char B26:1; /* Bit 26 */
unsigned char B25:1; /* Bit 25 */
unsigned char B24:1; /* Bit 24 */
unsigned char B23:1; /* Bit 23 */
unsigned char B22:1; /* Bit 22 */
unsigned char B21:1; /* Bit 21 */
unsigned char B20:1; /* Bit 20 */
unsigned char B19:1; /* Bit 19 */
unsigned char B18:1; /* Bit 18 */
unsigned char B17:1; /* Bit 17 */
unsigned char B16:1; /* Bit 16 */
} BIT; /* */
} PDIORH; /* */
union { /* PDIORL */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} PDIORL; /* */
union { /* PDCRH1 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char PD31MD:2; /* PD31MD */
unsigned char PD30MD:2; /* PD30MD */
unsigned char PD29MD:2; /* PD29MD */
unsigned char PD28MD:2; /* PD28MD */
unsigned char PD27MD:2; /* PD27MD */
unsigned char PD26MD:2; /* PD26MD */
unsigned char PD25MD:2; /* PD25MD */
unsigned char PD24MD:2; /* PD24MD */
} BIT; /* */
} PDCRH1; /* */
union { /* PDCRH2 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char PD23MD:2; /* PD23MD */
unsigned char PD22MD:2; /* PD22MD */
unsigned char PD21MD:2; /* PD21MD */
unsigned char PD20MD:2; /* PD20MD */
unsigned char PD19MD:2; /* PD19MD */
unsigned char PD18MD:2; /* PD18MD */
unsigned char PD17MD:2; /* PD17MD */
unsigned char PD16MD:2; /* PD16MD */
} BIT; /* */
} PDCRH2; /* */
union { /* PDCRL */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char PD15MD:1; /* PD15MD */
unsigned char PD14MD:1; /* PD14MD */
unsigned char PD13MD:1; /* PD13MD */
unsigned char PD12MD:1; /* PD12MD */
unsigned char PD11MD:1; /* PD11MD */
unsigned char PD10MD:1; /* PD10MD */
unsigned char PD9MD :1; /* PD9MD */
unsigned char PD8MD :1; /* PD8MD */
unsigned char PD7MD :1; /* PD7MD */
unsigned char PD6MD :1; /* PD6MD */
unsigned char PD5MD :1; /* PD5MD */
unsigned char PD4MD :1; /* PD4MD */
unsigned char PD3MD :1; /* PD3MD */
unsigned char PD2MD :1; /* PD2MD */
unsigned char PD1MD :1; /* PD1MD */
unsigned char PD0MD :1; /* PD0MD */
} BIT; /* */
} PDCRL; /* */
char wk4[6]; /* */
union { /* PEIOR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char B15:1; /* Bit 15 */
unsigned char B14:1; /* Bit 14 */
unsigned char B13:1; /* Bit 13 */
unsigned char B12:1; /* Bit 12 */
unsigned char B11:1; /* Bit 11 */
unsigned char B10:1; /* Bit 10 */
unsigned char B9 :1; /* Bit 9 */
unsigned char B8 :1; /* Bit 8 */
unsigned char B7 :1; /* Bit 7 */
unsigned char B6 :1; /* Bit 6 */
unsigned char B5 :1; /* Bit 5 */
unsigned char B4 :1; /* Bit 4 */
unsigned char B3 :1; /* Bit 3 */
unsigned char B2 :1; /* Bit 2 */
unsigned char B1 :1; /* Bit 1 */
unsigned char B0 :1; /* Bit 0 */
} BIT; /* */
} PEIOR; /* */
char wk5[2]; /* */
union { /* PECR1 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char PE15MD:2; /* PE15MD */
unsigned char PE14MD:2; /* PE14MD */
unsigned char PE13MD:2; /* PE13MD */
unsigned char :1; /* */
unsigned char PE12MD:1; /* PE12MD */
unsigned char :1; /* */
unsigned char PE11MD:1; /* PE11MD */
unsigned char :1; /* */
unsigned char PE10MD:1; /* PE10MD */
unsigned char :1; /* */
unsigned char PE9MD :1; /* PE9MD */
unsigned char :1; /* */
unsigned char PE8MD :1; /* PE8MD */
} BIT; /* */
} PECR1; /* */
union { /* PECR2 */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :1; /* */
unsigned char PE7MD:1; /* PE7MD */
unsigned char :1; /* */
unsigned char PE6MD:1; /* PE6MD */
unsigned char :1; /* */
unsigned char PE5MD:1; /* PE5MD */
unsigned char :1; /* */
unsigned char PE4MD:1; /* PE4MD */
unsigned char PE3MD:2; /* PE3MD */
unsigned char PE2MD:2; /* PE2MD */
unsigned char PE1MD:2; /* PE1MD */
unsigned char PE0MD:2; /* PE0MD */
} BIT; /* */
} PECR2; /* */
char wk6[12]; /* */
union { /* IFCR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char H; /* High */
unsigned char L; /* Low */
} BYTE; /* */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char :4; /* */
unsigned char IRQMD32:2; /* IRQMD3,2 */
unsigned char IRQMD10:2; /* IRQMD1,0 */
} BIT; /* */
} IFCR; /* */
}; /* */
struct st_cmt { /* struct CMT */
union { /* CMSTR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char :6; /* */
unsigned char STR1:1; /* STR1 */
unsigned char STR0:1; /* STR0 */
} BIT; /* */
} CMSTR; /* */
}; /* */
struct st_cmt0 { /* struct CMT0 */
union { /* CMCSR */
unsigned short WORD; /* Word Access */
struct { /* Byte Access */
unsigned char :8; /* */
unsigned char CMF :1; /* CMF */
unsigned char CMIE:1; /* CMIE */
unsigned char :4; /* */
unsigned char CKS :2; /* CKS */
} BIT; /* */
} CMCSR; /* */
unsigned short CMCNT; /* CMCNT */
unsigned short CMCOR; /* CMCOR */
}; /* */
struct st_ad0 { /* struct A/D0 */
union { /* ADDRA */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRA; /* */
union { /* ADDRB */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRB; /* */
union { /* ADDRC */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRC; /* */
union { /* ADDRD */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRD; /* */
char wk1[8]; /* */
union { /* ADCSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char ADF :1; /* ADF */
unsigned char ADIE:1; /* ADIE */
unsigned char ADST:1; /* ADST */
unsigned char SCAN:1; /* SCAN */
unsigned char CKS :1; /* CKS */
unsigned char CH :3; /* CH */
} BIT; /* */
} ADCSR; /* */
char wk2; /* */
union { /* ADCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TRGE:1; /* TRGE */
} BIT; /* */
} ADCR; /* */
}; /* */
struct st_ad1 { /* struct A/D1 */
union { /* ADDRA */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRA; /* */
union { /* ADDRB */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRB; /* */
union { /* ADDRC */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRC; /* */
union { /* ADDRD */
unsigned short WORD; /* Word Access */
unsigned char BYTE; /* Byte Access */
} ADDRD; /* */
char wk1; /* */
union { /* ADCSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char ADF :1; /* ADF */
unsigned char ADIE:1; /* ADIE */
unsigned char ADST:1; /* ADST */
unsigned char SCAN:1; /* SCAN */
unsigned char CKS :1; /* CKS */
unsigned char CH :3; /* CH */
} BIT; /* */
} ADCSR; /* */
char wk2; /* */
union { /* ADCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TRGE:1; /* TRGE */
} BIT; /* */
} ADCR; /* */
}; /* */
struct st_flash { /* struct FLASH */
union { /* FLMCR1 */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char FWE :1; /* FWE */
unsigned char SWE :1; /* SWE */
unsigned char ESU1:1; /* ESU1 */
unsigned char PSU1:1; /* PSU1 */
unsigned char EV1 :1; /* EV1 */
unsigned char PV1 :1; /* PV1 */
unsigned char E1 :1; /* E1 */
unsigned char P1 :1; /* P1 */
} BIT; /* */
} FLMCR1; /* */
union { /* FLMCR2 */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char FLER:1; /* FLER */
unsigned char :1; /* */
unsigned char ESU2:1; /* ESU2 */
unsigned char PSU2:1; /* PSU2 */
unsigned char EV2 :1; /* EV2 */
unsigned char PV2 :1; /* PV2 */
unsigned char E2 :1; /* E2 */
unsigned char P2 :1; /* P2 */
} BIT; /* */
} FLMCR2; /* */
union { /* EBR1 */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :4; /* */
unsigned char EB3:1; /* EB3 */
unsigned char EB2:1; /* EB2 */
unsigned char EB1:1; /* EB1 */
unsigned char EB0:1; /* EB0 */
} BIT; /* */
} EBR1; /* */
union { /* EBR2 */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char EB11:1; /* EB11 */
unsigned char EB10:1; /* EB10 */
unsigned char EB9 :1; /* EB9 */
unsigned char EB8 :1; /* EB8 */
unsigned char EB7 :1; /* EB7 */
unsigned char EB6 :1; /* EB6 */
unsigned char EB5 :1; /* EB5 */
unsigned char EB4 :1; /* EB4 */
} BIT; /* */
} EBR2; /* */
char wk[165]; /* */
union { /* RAMER */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char :5; /* */
unsigned char RAMS:1; /* RAMS */
unsigned char RAM :2; /* RAM */
} BIT; /* */
} RAMER; /* */
}; /* */
struct st_ubc { /* struct UBC */
void *UBAR; /* UBAR */
unsigned int UBAMR; /* UBAMR */
union { /* UBBR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char CP:2; /* CP */
unsigned char ID:2; /* ID */
unsigned char RW:2; /* RW */
unsigned char SZ:2; /* SZ */
} BIT; /* */
} UBBR; /* */
}; /* */
union un_wdt { /* union WDT */
struct { /* Read Access */
union { /* TCSR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char OVF :1; /* OVF */
unsigned char WTIT:1; /* WT/IT */
unsigned char TME :1; /* TME */
unsigned char :2; /* */
unsigned char CKS :3; /* CKS */
} BIT; /* */
} TCSR; /* */
unsigned char TCNT; /* TCNT */
char wk; /* */
union { /* RSTCSR */
unsigned char BYTE; /* Byte Access */
struct { /* */
unsigned char WRST:1; /* WSRT */
unsigned char RSTE:1; /* RSTE */
unsigned char RSTS:1; /* RSTS */
} BIT; /* */
} RSTCSR; /* */
} READ; /* */
struct { /* Write Access */
unsigned short TCSR; /* TCSR/TCNT */
unsigned short RSTCSR; /* RSTCSR */
} WRITE; /* */
}; /* */
union un_sbycr { /* union SBYCR */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char SBY:1; /* SBY */
unsigned char HIZ:1; /* HIZ */
} BIT; /* */
}; /* */
struct st_bsc { /* struct BSC */
union { /* BCR1 */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :2; /* */
unsigned char MTURWE:1; /* MTURWE */
unsigned char :4; /* */
unsigned char IOE :1; /* IOE */
unsigned char A3LG :1; /* A3LG */
unsigned char A2LG :1; /* A2LG */
unsigned char A1LG :1; /* A1LG */
unsigned char A0LG :1; /* A0LG */
unsigned char A3SZ :1; /* A3SZ */
unsigned char A2SZ :1; /* A2SZ */
unsigned char A1SZ :1; /* A1SZ */
unsigned char A0SZ :1; /* A0SZ */
} BIT; /* */
} BCR1; /* */
union { /* BCR2 */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char IW3:2; /* IW3 */
unsigned char IW2:2; /* IW2 */
unsigned char IW1:2; /* IW1 */
unsigned char IW0:2; /* IW0 */
unsigned char CW3:1; /* CW3 */
unsigned char CW2:1; /* CW2 */
unsigned char CW1:1; /* CW1 */
unsigned char CW0:1; /* CW0 */
unsigned char SW3:1; /* SW3 */
unsigned char SW2:1; /* SW2 */
unsigned char SW1:1; /* SW1 */
unsigned char SW0:1; /* SW0 */
} BIT; /* */
} BCR2; /* */
union { /* WCR1 */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char W3:4; /* W3 */
unsigned char W2:4; /* W2 */
unsigned char W1:4; /* W1 */
unsigned char W0:4; /* W0 */
} BIT; /* */
} WCR1; /* */
union { /* WCR2 */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char :2; /* */
unsigned char DDW:2; /* DDW */
unsigned char DSW:4; /* DSW */
} BIT; /* */
} WCR2; /* */
char wk[2]; /* */
union { /* DCR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char TPC :1; /* TPC */
unsigned char RCD :1; /* RCD */
unsigned char TRAS:2; /* TRAS */
unsigned char DWW :2; /* DWW */
unsigned char DWR :2; /* DWR */
unsigned char DIW :1; /* DIW */
unsigned char :1; /* */
unsigned char BE :1; /* BE */
unsigned char RASD:1; /* RASD */
unsigned char SZ :2; /* SZ */
unsigned char AMX :2; /* AMX */
} BIT; /* */
} DCR; /* */
union { /* RTCSR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char :1; /* */
unsigned char CMF :1; /* CMF */
unsigned char CMIE:1; /* CMIE */
unsigned char CKS :3; /* CKS */
unsigned char RFSH:1; /* RFSH */
unsigned char RMD :1; /* RMD */
} BIT; /* */
} RTCSR; /* */
unsigned short RTCNT; /* RTCNT */
unsigned short RTCOR; /* RTCOR */
}; /* */
struct st_dmac { /* struct DMAC */
union { /* DMAOR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned short :6; /* */
unsigned short PR :2; /* PR */
unsigned short :5; /* */
unsigned short AE :1; /* AE */
unsigned short NMIF:1; /* NMIF */
unsigned short DME :1; /* DME */
} BIT; /* */
} DMAOR; /* */
}; /* */
struct st_dmac0 { /* struct DMAC0 */
void *SAR; /* SAR */
void *DAR; /* DAR */
unsigned int DMATCR; /* DMATCR */
union { /* CHCR */
unsigned int LONG; /* Long Access */
struct { /* Word Access */
unsigned short H; /* High Word */
unsigned short L; /* Low Word */
} WORD; /* */
struct { /* Bit Access */
unsigned short :13; /* */
unsigned short RL: 1; /* RL */
unsigned short AM: 1; /* AM */
unsigned short AL: 1; /* AL */
unsigned short DM: 2; /* DM */
unsigned short SM: 2; /* SM */
unsigned short RS: 4; /* RS */
unsigned short : 1; /* */
unsigned short DS: 1; /* DS */
unsigned short TM: 1; /* TM */
unsigned short TS: 2; /* TS */
unsigned short IE: 1; /* IE */
unsigned short TE: 1; /* TE */
unsigned short DE: 1; /* DE */
} BIT; /* */
} CHCR; /* */
}; /* */
struct st_dmac2 { /* struct DMAC2 */
void *SAR; /* SAR */
void *DAR; /* DAR */
unsigned int DMATCR; /* DMATCR */
union { /* CHCR */
unsigned int LONG; /* Long Access */
struct { /* Word Access */
unsigned short H; /* High Word */
unsigned short L; /* Low Word */
} WORD; /* */
struct { /* Bit Access */
unsigned short :12; /* */
unsigned short RO: 1; /* RO */
unsigned short : 3; /* */
unsigned short DM: 2; /* DM */
unsigned short SM: 2; /* SM */
unsigned short RS: 4; /* RS */
unsigned short : 2; /* */
unsigned short TM: 1; /* TM */
unsigned short TS: 2; /* TS */
unsigned short IE: 1; /* IE */
unsigned short TE: 1; /* TE */
unsigned short DE: 1; /* DE */
} BIT; /* */
} CHCR; /* */
}; /* */
struct st_dmac3 { /* struct DMAC3 */
void *SAR; /* SAR */
void *DAR; /* DAR */
unsigned int DMATCR; /* DMATCR */
union { /* CHCR */
unsigned int LONG; /* Long Access */
struct { /* Word Access */
unsigned short H; /* High Word */
unsigned short L; /* Low Word */
} WORD; /* */
struct { /* Bit Access */
unsigned short :11; /* */
unsigned short DI: 1; /* DI */
unsigned short : 4; /* */
unsigned short DM: 2; /* DM */
unsigned short SM: 2; /* SM */
unsigned short RS: 4; /* RS */
unsigned short : 2; /* */
unsigned short TM: 1; /* TM */
unsigned short TS: 2; /* TS */
unsigned short IE: 1; /* IE */
unsigned short TE: 1; /* TE */
unsigned short DE: 1; /* DE */
} BIT; /* */
} CHCR; /* */
}; /* */
struct st_dtc { /* struct DTC */
union { /* DTEA */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TGI4A:1; /* TGI4A */
unsigned char TGI4B:1; /* TGI4B */
unsigned char TGI4C:1; /* TGI4C */
unsigned char TGI4D:1; /* TGI4D */
unsigned char TGI4V:1; /* TGI4V */
unsigned char TGI3A:1; /* TGI3A */
unsigned char TGI3B:1; /* TGI3B */
unsigned char TGI3C:1; /* TGI3C */
} BIT; /* */
} DTEA; /* */
union { /* DTEB */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TGI3D:1; /* TGI3D */
unsigned char TGI2A:1; /* TGI2A */
unsigned char TGI2B:1; /* TGI2B */
unsigned char TGI1A:1; /* TGI1A */
unsigned char TGI1B:1; /* TGI1B */
unsigned char TGI0A:1; /* TGI0A */
unsigned char TGI0B:1; /* TGI0B */
unsigned char TGI0C:1; /* TGI0C */
} BIT; /* */
} DTEB; /* */
union { /* DTEC */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char TGI0D:1; /* TGI0D */
unsigned char ADI :1; /* ADI */
unsigned char IRQ0 :1; /* IRQ0 */
unsigned char IRQ1 :1; /* IRQ1 */
unsigned char IRQ2 :1; /* IRQ2 */
unsigned char IRQ3 :1; /* IRQ3 */
unsigned char IRQ4 :1; /* IRQ4 */
unsigned char IRQ5 :1; /* IRQ5 */
} BIT; /* */
} DTEC; /* */
union { /* DTED */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char IRQ6:1; /* IRQ6 */
unsigned char IRQ7:1; /* IRQ7 */
unsigned char CMI0:1; /* CMI0 */
unsigned char CMI1:1; /* CMI1 */
unsigned char RXI0:1; /* RXI0 */
unsigned char TXI0:1; /* TXI0 */
unsigned char RXI1:1; /* RXI1 */
unsigned char TXI1:1; /* TXI1 */
} BIT; /* */
} DTED; /* */
union { /* DTEE */
unsigned char BYTE; /* Byte Access */
struct { /* Bit Access */
unsigned char CMI:1; /* CMI */
} BIT; /* */
} DTEE; /* */
char wk; /* */
union { /* DTCSR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :5; /* */
unsigned char NMIF :1; /* NMIF */
unsigned char AE :1; /* AE */
unsigned char SWDTE:1; /* SWDTE */
unsigned char DTVEC:8; /* DTVEC */
} BIT; /* */
} DTCSR; /* */
unsigned short DTBR; /* DTBR */
}; /* */
union un_ccr { /* union CCR */
unsigned short WORD; /* Word Access */
struct { /* Bit Access */
unsigned char :8; /* */
unsigned char :3; /* */
unsigned char CEDRAM:1; /* CEDRAM */
unsigned char CECS3 :1; /* CECS3 */
unsigned char CECS2 :1; /* CECS2 */
unsigned char CECS1 :1; /* CECS1 */
unsigned char CECS0 :1; /* CECS0 */
} BIT; /* */
}; /* */
#define SCI0 (*(volatile struct st_sci *)0xFFFF81A0) /* SCI0 Address*/
#define SCI1 (*(volatile struct st_sci *)0xFFFF81B0) /* SCI1 Address*/
#define MTU (*(volatile struct st_mtu *)0xFFFF820A) /* MTU Address*/
#define MTU0 (*(volatile struct st_mtu0 *)0xFFFF8260) /* MTU0 Address*/
#define MTU1 (*(volatile struct st_mtu1 *)0xFFFF8280) /* MTU1 Address*/
#define MTU2 (*(volatile struct st_mtu1 *)0xFFFF82A0) /* MTU2 Address*/
#define MTU3 (*(volatile struct st_mtu3 *)0xFFFF8200) /* MTU3 Address*/
#define MTU4 (*(volatile struct st_mtu4 *)0xFFFF8200) /* MTU4 Address*/
#define POE (*(volatile struct st_poe *)0xFFFF83C0) /* POE Address*/
#define INTC (*(volatile struct st_intc *)0xFFFF8348) /* INTC Address*/
#define PA (*(volatile struct st_pa *)0xFFFF8380) /* PA Address*/
#define PB (*(volatile struct st_pb *)0xFFFF8390) /* PB Address*/
#define PC (*(volatile struct st_pc *)0xFFFF8392) /* PC Address*/
#define PD (*(volatile struct st_pd *)0xFFFF83A0) /* PD Address*/
#define PE (*(volatile struct st_pe *)0xFFFF83B0) /* PE Address*/
#define PF (*(volatile struct st_pf *)0xFFFF83B3) /* PF Address*/
#define PFC (*(volatile struct st_pfc *)0xFFFF8384) /* PFC Address*/
#define CMT (*(volatile struct st_cmt *)0xFFFF83D0) /* CMT Address*/
#define CMT0 (*(volatile struct st_cmt0 *)0xFFFF83D2) /* CMT0 Address*/
#define CMT1 (*(volatile struct st_cmt0 *)0xFFFF83D8) /* CMT1 Address*/
#define AD0 (*(volatile struct st_ad0 *)0xFFFF8400) /* A/D0 Address*/
#define AD1 (*(volatile struct st_ad1 *)0xFFFF8408) /* A/D1 Address*/
#define FLASH (*(volatile struct st_flash *)0xFFFF8580) /* FLASH Address*/
#define UBC (*(volatile struct st_ubc *)0xFFFF8600) /* UBC Address*/
#define WDT (*(volatile union un_wdt *)0xFFFF8610) /* WDT Address*/
#define SBYCR (*(volatile union un_sbycr *)0xFFFF8614) /* SBYCR Address*/
#define BSC (*(volatile struct st_bsc *)0xFFFF8620) /* BSC Address*/
#define DMAC (*(volatile struct st_dmac *)0xFFFF86B0) /* DMAC Address*/
#define DMAC0 (*(volatile struct st_dmac0 *)0xFFFF86C0) /* DMAC0 Address*/
#define DMAC1 (*(volatile struct st_dmac0 *)0xFFFF86D0) /* DMAC1 Address*/
#define DMAC2 (*(volatile struct st_dmac2 *)0xFFFF86E0) /* DMAC2 Address*/
#define DMAC3 (*(volatile struct st_dmac3 *)0xFFFF86F0) /* DMAC3 Address*/
#define DTC (*(volatile struct st_dtc *)0xFFFF8700) /* DTC Address*/
#define CCR (*(volatile union un_ccr *)0xFFFF8740) /* CCR Address*/
#endif
resetprg.c 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :resetprg.c */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Reset Program */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/******************************************************************************
* *
* M O D U L E D E F I N E *
* *
******************************************************************************/
#define RESETPRG_C
/******************************************************************************
* *
* C O M P I L E R D E F I N E D I N C L U D E F I L E S *
* *
******************************************************************************/
#include <machine.h>
#include <_h_c_lib.h>
/******************************************************************************
* *
* U S E R D E F I N E D I N C L U D E F I L E S *
* *
******************************************************************************/
#include "stacksct.h"
#include "HwSetup.h"
#include "..\AppMain.h"
/******************************************************************************
* *
* L O C A L D E F I N E S *
* *
******************************************************************************/
#define SR_Init 0x000000F0
#define INT_OFFSET 0x10
/******************************************************************************
* *
* L O C A L T Y P E D E F S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* L O C A L F U N C T I O N P R O T O T Y P E S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* L O C A L I N I T I A L I Z E D D A T A D E F I N I T I O N S *
* *
******************************************************************************/
/* None */
/******************************************************************************
* *
* L O C A L U N I T I A L I Z E D D A T A D E F I N I T I O N S *
* *
******************************************************************************/
extern unsigned int INT_Vectors;
extern void PowerON_Reset_PC(void);
extern void main(void);
#pragma section ResetPRG
#pragma entry PowerON_Reset_PC
/******************************************************************************
*
* Function:
* PowerON_Reset_PC
*
* Description:
* This global function Power On Reset function.
*
* Input:
* None
*
* Output:
* None.
*
******************************************************************************/
void PowerON_Reset_PC(void)
{
set_vbr((void *)((char *)&INT_Vectors - INT_OFFSET));
InitialIO();
InitialBUS();
InitialCCR();
_INITSCT();
InitialExtIO();
// _CALL_INIT(); // Remove the comment when you use global class object
// _INIT_IOLIB(); // Use SIM I/O
// errno=0; // Remove the comment when you use errno
// srand(1); // Remove the comment when you use rand()
// _s1ptr=NULL; // Remove the comment when you use strtok()
set_cr(SR_Init);
nop();
main();
// _CLOSEALL(); // Use SIM I/O
// _CALL_END(); // Remove the comment when you use global class object
sleep();
}
/******************************************************************************
*
* Function:
* Manual_Reset_PC
*
* Description:
* This global function Manual Reset function.
*
* Input:
* None
*
* Output:
* None.
*
******************************************************************************/
//#pragma entry Manual_Reset_PC // Remove the comment when you use Manual Reset
void Manual_Reset_PC(void)
{
}
/***********************************************************************/
#pragma section ResetEnd
void ResetEnd(void){}
/***********************************************************************/
sbrk.c 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :sbrk.c */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Program of sbrk */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
#include <stddef.h>
#include <stdio.h>
#include "sbrk.h"
extern char *_s1ptr;
#pragma section HeapArea
static union {
long dummy; /* Dummy for 4-byte boundary */
char heap[HEAPSIZE]; /* Declaration of the area managed */
/* by sbrk */
} heap_area;
#pragma section
static char *brk = (char *)&heap_area; /* End address of area assigned */
/**************************************************************************/
/* sbrk:Data write */
/* Return value:Start address of the assigned area (Pass) */
/* -1 (Failure) */
/**************************************************************************/
char *sbrk(unsigned long size) /* Assigned area size */
{
char *p;
if (brk + size > heap_area.heap + HEAPSIZE) /* Empty area size */
return (char *)-1;
p = brk; /* Area assignment */
brk += size; /* End address update */
return p;
}
sbrk.h 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :sbrk.h */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Header file of sbrk file */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
/* size of area managed by sbrk */
#define HEAPSIZE 0x140000
sham.h 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/* follow machine.h */
extern void set_imask(int);
extern int get_imask(void);
extern void set_cr(int);
extern int get_cr(void);
extern void set_vbr(void *);
extern void *get_vbr(void);
extern void sleep(void);
extern void ldtlb(void);
extern void set_gbr(void *);
extern void *get_gbr(void);
extern unsigned char gbr_read_byte(int);
extern unsigned short gbr_read_word(int);
extern unsigned long gbr_read_long(int);
extern void gbr_write_byte(int, unsigned char);
extern void gbr_write_word(int, unsigned short);
extern void gbr_write_long(int, unsigned long);
extern void gbr_and_byte(int, unsigned char);
extern void gbr_or_byte(int, unsigned char);
extern void gbr_xor_byte(int, unsigned char);
extern int gbr_tst_byte(int, unsigned char);
extern int tas(char *);
extern int trapa(int);
extern int macw(short *, short *, unsigned int);
extern int macwl(short *, short *, unsigned int, unsigned int);
extern int macl(int *, int *, unsigned int);
extern int macll(int *, int *, unsigned int, unsigned int);
extern int trapa_svc(...);
extern void prefetch(void *);
extern void set_fpscr(int);
extern int get_fpscr(void);
extern float fipr(float a1[], float b1[]);
extern void ftrv(float a1[], float b1[]);
extern void ftrvadd(float a1[], float b1[], float c1[]);
extern void ftrvsub(float a1[], float b1[], float c1[]);
extern void mtrx4mul(float [][4], float [][4]);
extern void mtrx4muladd(float [][4], float [][4], float [][4]);
extern void mtrx4mulsub(float [][4], float [][4], float [][4]);
extern void ld_ext(float [][4]);
extern void st_ext(float [][4]);
extern void add4(float a1[], float b1[], float c1[]);
extern void sub4(float a1[], float b1[], float c1[]);
extern void trace(long);
extern void nop(void);
extern unsigned short swapb(unsigned short);
extern unsigned long swapw(unsigned long);
extern unsigned long end_cnvl(unsigned long);
extern unsigned long dmulu_h(unsigned long, unsigned long);
extern unsigned long dmulu_l(unsigned long, unsigned long);
extern long dmuls_h(long, long);
extern unsigned long dmuls_l(long, long);
/* follow ctype.h */
extern int isalnum(int);
extern int isalpha(int);
extern int iscntrl(int);
extern int isdigit(int);
extern int isgraph(int);
extern int islower(int);
extern int isprint(int);
extern int ispunct(int);
extern int isspace(int);
extern int isupper(int);
extern int isxdigit(int);
extern int tolower(int);
extern int toupper(int);
/* follow math.h */
extern double frexp(double, int *);
extern double ldexp(double, int);
extern double modf(double, double *);
extern double ceil(double);
extern double fabs(double);
extern double floor(double);
extern double fmod(double, double);
extern double acos(double);
extern double asin(double);
extern double atan(double);
extern double atan2(double, double);
extern double cos(double);
extern double sin(double);
extern double tan(double);
extern double cosh(double);
extern double tanh(double);
extern double sinh(double);
extern double exp(double);
extern double log(double);
extern double log10(double);
extern double pow(double, double);
extern double sqrt(double);
/* follow mathf.h */
extern float frexpf(float, int *);
extern float ldexpf(float, int);
extern float modff(float, float *);
extern float ceilf(float);
extern float fabsf(float);
extern float floorf(float);
extern float fmodf(float, float);
extern float acosf(float);
extern float asinf(float);
extern float atanf(float);
extern float atan2f(float,float);
extern float cosf(float);
extern float sinf(float);
extern float tanf(float);
extern float coshf(float);
extern float tanhf(float);
extern float sinhf(float);
extern float expf(float);
extern float logf(float);
extern float log10f(float);
extern float powf(float,float);
extern float sqrtf(float);
/* follow setjmp.h */
extern int setjmp(jmp_buf);
extern void longjmp(jmp_buf, int);
/* follow stdarg.h */
void va_start(va_list, parmN);
type va_arg(va_list, type);
void va_end(va_list);
/* follow stdio.h */
extern int _fillbuf(FILE *);
extern int _flshbuf(int, FILE *);
extern void _putcsub(FILE *);
extern int fclose(FILE *);
extern int fflush(FILE *);
extern FILE *fopen(const char *, const char *);
extern FILE *freopen(const char *, const char *, FILE *);
extern void setbuf(FILE *, char *);
extern int setvbuf(FILE *, char *, int, size_t);
extern int fprintf(FILE *, const char *, ...);
extern int fscanf(FILE *, const char *, ...);
extern int printf(const char *, ...);
extern int scanf(const char *, ...);
extern int sprintf(char *, const char *, ...);
extern int sscanf(const char *, const char *, ...);
extern int vfprintf(FILE *, const char *, char *);
extern int vprintf(const char *, char *);
extern int vsprintf(char *, const char *, char *);
extern int fgetc(FILE *);
extern char *fgets(char *, int, FILE *);
extern int fputc(int , FILE *);
extern int fputs(const char *, FILE *);
extern int getc(FILE *);
extern int getchar(void);
extern char *gets(char *);
extern int putc(int, FILE *);
extern int putchar(int);
extern int puts(const char *);
extern int ungetc(int, FILE *);
extern size_t fread(void *, size_t, size_t, FILE *);
extern size_t fwrite(const void *, size_t, size_t, FILE *);
extern int fseek(FILE *, long int, int);
extern long ftell(FILE *);
extern void rewind(FILE *);
extern void clearerr(FILE *);
extern int feof(FILE *);
extern int ferror(FILE *);
extern void perror(const char *);
/* follow stdlib.h */
extern double atof(const char *);
extern int atoi(const char *);
extern long int atol(const char *);
extern double strtod(const char *, char **);
extern long int strtol(const char *, char **, int);
extern int rand(void);
extern void srand(unsigned int);
extern void *calloc(size_t, size_t);
extern void free(void *);
extern void *malloc(size_t);
extern void *realloc(void *, size_t);
extern void *bsearch(const void *, const void *, size_t, size_t, int(*)(const void *, const void *));
extern void qsort(void *, size_t, size_t, int(*)(const void *, const void *));
extern int abs(int);
extern div_t div(int, int);
extern long int labs(long int);
extern ldiv_t ldiv(long int, long int);
/* follow string.h */
extern void *memcpy(void *, const void *, size_t);
extern void *memmove(void *, const void *, size_t);
extern char *strcpy(char *, const char *);
extern char *strncpy(char *, const char *, size_t);
extern char *strcat(char *, const char *);
extern char *strncat(char *, const char *, size_t);
extern int memcmp(const void *, const void *, size_t);
extern int strcmp(const char *, const char *);
extern int strncmp(const char *, const char *, size_t);
extern void *memchr(const void *, int, size_t);
extern char *strchr(const char *, int);
extern size_t strcspn(const char *, const char *);
extern char *strpbrk(const char *, const char *);
extern char *strrchr(const char *, int);
extern size_t strspn(const char *, const char *);
extern char *strstr(const char *, const char *);
extern char *strtok(char *, const char *);
extern void *memset(void *, int, size_t);
extern char *strerror(int);
extern size_t strlen(const char *);
stacksct.h 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :stacksct.h */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Setting of Stack area */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
#pragma stacksize 0x8000 /* Do not modify this line. */
vect.h 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :vect.h */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Definition of Vector */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
//;<<VECTOR DATA START (POWER ON RESET)>>
//;0 Power On Reset PC
extern void PowerON_Reset_PC(void);
//;<<VECTOR DATA END (POWER ON RESET)>>
// 1 Power On Reset SP
//;<<VECTOR DATA START (MANUAL RESET)>>
//;2 Manual Reset PC
extern void Manual_Reset_PC(void);
//;<<VECTOR DATA END (MANUAL RESET)>>
// 3 Manual Reset SP
// 4 Illegal code
#pragma interrupt INT_Illegal_code
extern void INT_Illegal_code(void);
// 5 Reserved
// 6 Illegal slot
#pragma interrupt INT_Illegal_slot
extern void INT_Illegal_slot(void);
// 7 Reserved
// 8 Reserved
// 9 CPU Address error
#pragma interrupt INT_CPU_Address
extern void INT_CPU_Address(void);
// 10 DMAC Address error
#pragma interrupt INT_DMAC_Address
extern void INT_DMAC_Address(void);
// 11 NMI
#pragma interrupt INT_NMI
extern void INT_NMI(void);
// 12 User breakpoint trap
#pragma interrupt INT_User_Break
extern void INT_User_Break(void);
// 13 Reserved
// 14 Reserved
// 15 Reserved
// 16 Reserved
// 17 Reserved
// 18 Reserved
// 19 Reserved
// 20 Reserved
// 21 Reserved
// 22 Reserved
// 23 Reserved
// 24 Reserved
// 25 Reserved
// 26 Reserved
// 27 Reserved
// 28 Reserved
// 29 Reserved
// 30 Reserved
// 31 Reserved
// 32 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA32
extern void INT_TRAPA32(void);
// 33 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA33
extern void INT_TRAPA33(void);
// 34 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA34
extern void INT_TRAPA34(void);
// 35 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA35
extern void INT_TRAPA35(void);
// 36 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA36
extern void INT_TRAPA36(void);
// 37 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA37
extern void INT_TRAPA37(void);
// 38 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA38
extern void INT_TRAPA38(void);
// 39 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA39
extern void INT_TRAPA39(void);
// 40 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA40
extern void INT_TRAPA40(void);
// 41 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA41
extern void INT_TRAPA41(void);
// 42 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA42
extern void INT_TRAPA42(void);
// 43 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA43
extern void INT_TRAPA43(void);
// 44 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA44
extern void INT_TRAPA44(void);
// 45 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA45
extern void INT_TRAPA45(void);
// 46 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA46
extern void INT_TRAPA46(void);
// 47 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA47
extern void INT_TRAPA47(void);
// 48 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA48
extern void INT_TRAPA48(void);
// 49 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA49
extern void INT_TRAPA49(void);
// 50 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA50
extern void INT_TRAPA50(void);
// 51 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA51
extern void INT_TRAPA51(void);
// 52 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA52
extern void INT_TRAPA52(void);
// 53 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA53
extern void INT_TRAPA53(void);
// 54 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA54
extern void INT_TRAPA54(void);
// 55 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA55
extern void INT_TRAPA55(void);
// 56 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA56
extern void INT_TRAPA56(void);
// 57 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA57
extern void INT_TRAPA57(void);
// 58 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA58
extern void INT_TRAPA58(void);
// 59 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA59
extern void INT_TRAPA59(void);
// 60 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA60
extern void INT_TRAPA60(void);
// 61 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA61
extern void INT_TRAPA61(void);
// 62 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA62
extern void INT_TRAPA62(void);
// 63 TRAPA (User Vecter)
#pragma interrupt INT_TRAPA63
extern void INT_TRAPA63(void);
// 64 Interrupt IRQ0
#pragma interrupt INT_IRQ0
extern void INT_IRQ0(void);
// 65 Interrupt IRQ1
#pragma interrupt INT_IRQ1
extern void INT_IRQ1(void);
// 66 Interrupt IRQ2
#pragma interrupt INT_IRQ2
extern void INT_IRQ2(void);
// 67 Interrupt IRQ3
#pragma interrupt INT_IRQ3
extern void INT_IRQ3(void);
// 68 Interrupt IRQ4
#pragma interrupt INT_IRQ4
extern void INT_IRQ4(void);
// 69 Interrupt IRQ5
#pragma interrupt INT_IRQ5
extern void INT_IRQ5(void);
// 70 Interrupt IRQ6
#pragma interrupt INT_IRQ6
extern void INT_IRQ6(void);
// 71 Interrupt IRQ7
#pragma interrupt INT_IRQ7
extern void INT_IRQ7(void);
// 72 DMAC0 DEI0
#pragma interrupt INT_DMAC0_DEI0
extern void INT_DMAC0_DEI0(void);
// 73 Reserved
// 74 Reserved
// 75 Reserved
// 76 DMAC1 DEI1
#pragma interrupt INT_DMAC1_DEI1
extern void INT_DMAC1_DEI1(void);
// 77 Reserved
// 78 Reserved
// 79 Reserved
// 80 DMAC3 DEI2
#pragma interrupt INT_DMAC3_DEI2
extern void INT_DMAC3_DEI2(void);
// 81 Reserved
// 82 Reserved
// 83 Reserved
// 84 DMAC3 DEI3
#pragma interrupt INT_DMAC3_DEI3
extern void INT_DMAC3_DEI3(void);
// 85 ReservedB
// 86 Reserved
// 87 Reserved
// 88 MTU0 TGI0A
#pragma interrupt INT_MTU0_TGI0A
extern void INT_MTU0_TGI0A(void);
// 89 MTU0 TGI0B
#pragma interrupt INT_MTU0_TGI0B
extern void INT_MTU0_TGI0B(void);
// 90 MTU0 TGI0C
#pragma interrupt INT_MTU0_TGI0C
extern void INT_MTU0_TGI0C(void);
// 91 MTU0 TGI0D
#pragma interrupt INT_MTU0_TGI0D
extern void INT_MTU0_TGI0D(void);
// 92 MTU0 TCI0V
#pragma interrupt INT_MTU0_TCI0V
extern void INT_MTU0_TCI0V(void);
// 93 Reserved
// 94 Reserved
// 95 Reserved
// 96 MTU1 TGI1A
#pragma interrupt INT_MTU1_TGI1A
extern void INT_MTU1_TGI1A(void);
// 97 MTU1 TGI1B
#pragma interrupt INT_MTU1_TGI1B
extern void INT_MTU1_TGI1B(void);
// 98 Reserved
// 99 Reserved
// 100 MTU1 TCI1V
#pragma interrupt INT_MTU1_TCI1V
extern void INT_MTU1_TCI1V(void);
// 101 MTU1 TCI1U
#pragma interrupt INT_MTU1_TCI1U
extern void INT_MTU1_TCI1U(void);
// 102 Reserved
// 103 Reserved
// 104 MTU2 TGI2A
#pragma interrupt INT_MTU2_TGI2A
extern void INT_MTU2_TGI2A(void);
// 105 MTU2 TGI2B
#pragma interrupt INT_MTU2_TGI2B
extern void INT_MTU2_TGI2B(void);
// 106 Reserved
// 107 Reserved
// 108 MTU2 TCI2V
#pragma interrupt INT_MTU2_TCI2V
extern void INT_MTU2_TCI2V(void);
// 109 MTU2 TCI2U
#pragma interrupt INT_MTU2_TCI2U
extern void INT_MTU2_TCI2U(void);
// 110 Reserved
// 111 Reserved
// 112 MTU3 TGI3A
#pragma interrupt INT_MTU3_TGI3A
extern void INT_MTU3_TGI3A(void);
// 113 MTU3 TGI3B
#pragma interrupt INT_MTU3_TGI3B
extern void INT_MTU3_TGI3B(void);
// 114 MTU3 TGI3C
#pragma interrupt INT_MTU3_TGI3C
extern void INT_MTU3_TGI3C(void);
// 115 MTU3 TGI3D
#pragma interrupt INT_MTU3_TGI3D
extern void INT_MTU3_TGI3D(void);
// 116 MTU3 TCI3V
#pragma interrupt INT_MTU3_TCI3V
extern void INT_MTU3_TCI3V(void);
// 117 Reserved
// 118 Reserved
// 119 Reserved
// 120 MTU4 TGI4A
#pragma interrupt INT_MTU4_TGI4A
extern void INT_MTU4_TGI4A(void);
// 121 MTU4 TGI4B
#pragma interrupt INT_MTU4_TGI4B
extern void INT_MTU4_TGI4B(void);
// 122 MTU4 TGI4C
#pragma interrupt INT_MTU4_TGI4C
extern void INT_MTU4_TGI4C(void);
// 123 MTU4 TGI4D
#pragma interrupt INT_MTU4_TGI4D
extern void INT_MTU4_TGI4D(void);
// 124 MTU4 TCI4V
#pragma interrupt INT_MTU4_TCI4V
extern void INT_MTU4_TCI4V(void);
// 125 Reserved
// 126 Reserved
// 127 Reserved
// 128 SCI0 ERI0
#pragma interrupt INT_SCI0_ERI0
extern void INT_SCI0_ERI0(void);
// 129 SCI0 RXI0
#pragma interrupt INT_SCI0_RXI0
extern void INT_SCI0_RXI0(void);
// 130 SCI0 TXI0
#pragma interrupt INT_SCI0_TXI0
extern void INT_SCI0_TXI0(void);
// 131 SCI0 TEI0
#pragma interrupt INT_SCI0_TEI0
extern void INT_SCI0_TEI0(void);
// 132 SCI1 ERI1
#pragma interrupt INT_SCI1_ERI1
extern void INT_SCI1_ERI1(void);
// 133 SCI1 RXI1
#pragma interrupt INT_SCI1_RXI1
extern void INT_SCI1_RXI1(void);
// 134 SCI1 TXI1
#pragma interrupt INT_SCI1_TXI1
extern void INT_SCI1_TXI1(void);
// 135 SCI1 TEI1
#pragma interrupt INT_SCI1_TEI1
extern void INT_SCI1_TEI1(void);
// 136 A/D ADI0
#pragma interrupt INT_ADI0
extern void INT_ADI0(void);
// 137 A/D ADI0
#pragma interrupt INT_ADI1
extern void INT_ADI1(void);
// 138 Reserved
// 139 Reserved
// 140 DTC SWDTCE
#pragma interrupt INT_DTC_SWDTCE
extern void INT_DTC_SWDTCE(void);
// 141 Reserved
// 142 Reserved
// 143 Reserved
// 144 CMT0 CMI0
#pragma interrupt INT_CMT0_CMI0
extern void INT_CMT0_CMI0(void);
// 145 Reserved
// 146 Reserved
// 147 Reserved
// 148 CMT1 CMI1
#pragma interrupt INT_CMT1_CMI1
extern void INT_CMT1_CMI1(void);
// 149 Reserved
// 150 Reserved
// 151 Reserved
// 152 WDT ITI
#pragma interrupt INT_WDT_ITI
extern void INT_WDT_ITI(void);
// 153 BSC CMI
#pragma interrupt INT_BSC_CMI
extern void INT_BSC_CMI(void);
// 154 Reserved
// 155 Reserved
// 156 I/O OEI
#pragma interrupt INT_OEI
extern void INT_OEI(void);
// 157 Reserved
// 158 Reserved
// 159 Reserved
// 160 Reserved
// 161 Reserved
// 162 Reserved
// 163 Reserved
// 164 Reserved
// 165 Reserved
// 166 Reserved
// 167 Reserved
// 168 Reserved
// 169 Reserved
// 170 Reserved
// 171 Reserved
// 172 Reserved
// 173 Reserved
// 174 Reserved
// 175 Reserved
// 176 Reserved
// 177 Reserved
// 178 Reserved
// 179 Reserved
// 180 Reserved
// 181 Reserved
// 182 Reserved
// 183 Reserved
// 184 Reserved
// 185 Reserved
// 186 Reserved
// 187 Reserved
// 188 Reserved
// 189 Reserved
// 190 Reserved
// 191 Reserved
// 192 Reserved
// 193 Reserved
// 194 Reserved
// 195 Reserved
// 196 Reserved
// 197 Reserved
// 198 Reserved
// 199 Reserved
// 200 Reserved
// 201 Reserved
// 202 Reserved
// 203 Reserved
// 204 Reserved
// 205 Reserved
// 206 Reserved
// 207 Reserved
// 208 Reserved
// 209 Reserved
// 210 Reserved
// 211 Reserved
// 212 Reserved
// 213 Reserved
// 214 Reserved
// 215 Reserved
// 216 Reserved
// 217 Reserved
// 218 Reserved
// 219 Reserved
// 220 Reserved
// 221 Reserved
// 222 Reserved
// 223 Reserved
// 224 Reserved
// 225 Reserved
// 226 Reserved
// 227 Reserved
// 228 Reserved
// 229 Reserved
// 230 Reserved
// 231 Reserved
// 232 Reserved
// 233 Reserved
// 234 Reserved
// 235 Reserved
// 236 Reserved
// 237 Reserved
// 238 Reserved
// 239 Reserved
// 240 Reserved
// 241 Reserved
// 242 Reserved
// 243 Reserved
// 244 Reserved
// 245 Reserved
// 246 Reserved
// 247 Reserved
// 248 Reserved
// 249 Reserved
// 250 Reserved
// 251 Reserved
// 252 Reserved
// 253 Reserved
// 254 Reserved
// 255 Reserved
// Dummy
#pragma interrupt Dummy
extern void Dummy(void);
vecttbl.c 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
/***********************************************************************/
/* */
/* FILE :vecttbl.c */
/* DATE :Thu, Sep 22, 2005 */
/* DESCRIPTION :Initialize of Vector Table */
/* CPU TYPE :SH7042 */
/* */
/* This file is generated by Renesas Project Generator (Ver.3.0). */
/* */
/***********************************************************************/
#include "vect.h"
#pragma section VECTTBL
void *RESET_Vectors[] = {
//;<<VECTOR DATA START (POWER ON RESET)>>
//;0 Power On Reset PC
(void*) PowerON_Reset_PC,
//;<<VECTOR DATA END (POWER ON RESET)>>
// 1 Power On Reset SP
__secend("S"),
//;<<VECTOR DATA START (MANUAL RESET)>>
//;2 Manual Reset PC
(void*) Manual_Reset_PC,
//;<<VECTOR DATA END (MANUAL RESET)>>
// 3 Manual Reset SP
__secend("S")
};
#pragma section INTTBL
void *INT_Vectors[] = {
// 4 Illegal code
(void*) INT_Illegal_code,
// 5 Reserved
(void*) Dummy,
// 6 Illegal slot
(void*) INT_Illegal_slot,
// 7 Reserved
(void*) Dummy,
// 8 Reserved
(void*) Dummy,
// 9 CPU Address error
(void*) INT_CPU_Address,
// 10 DMAC Address error
(void*) INT_DMAC_Address,
// 11 NMI
(void*) INT_NMI,
// 12 User breakpoint trap
(void*) INT_User_Break,
// 13 Reserved
(void*) Dummy,
// 14 Reserved
(void*) Dummy,
// 15 Reserved
(void*) Dummy,
// 16 Reserved
(void*) Dummy,
// 17 Reserved
(void*) Dummy,
// 18 Reserved
(void*) Dummy,
// 19 Reserved
(void*) Dummy,
// 20 Reserved
(void*) Dummy,
// 21 Reserved
(void*) Dummy,
// 22 Reserved
(void*) Dummy,
// 23 Reserved
(void*) Dummy,
// 24 Reserved
(void*) Dummy,
// 25 Reserved
(void*) Dummy,
// 26 Reserved
(void*) Dummy,
// 27 Reserved
(void*) Dummy,
// 28 Reserved
(void*) Dummy,
// 29 Reserved
(void*) Dummy,
// 30 Reserved
(void*) Dummy,
// 31 Reserved
(void*) Dummy,
// 32 TRAPA (User Vecter)
(void*) INT_TRAPA32,
// 33 TRAPA (User Vecter)
(void*) INT_TRAPA33,
// 34 TRAPA (User Vecter)
(void*) INT_TRAPA34,
// 35 TRAPA (User Vecter)
(void*) INT_TRAPA35,
// 36 TRAPA (User Vecter)
(void*) INT_TRAPA36,
// 37 TRAPA (User Vecter)
(void*) INT_TRAPA37,
// 38 TRAPA (User Vecter)
(void*) INT_TRAPA38,
// 39 TRAPA (User Vecter)
(void*) INT_TRAPA39,
// 40 TRAPA (User Vecter)
(void*) INT_TRAPA40,
// 41 TRAPA (User Vecter)
(void*) INT_TRAPA41,
// 42 TRAPA (User Vecter)
(void*) INT_TRAPA42,
// 43 TRAPA (User Vecter)
(void*) INT_TRAPA43,
// 44 TRAPA (User Vecter)
(void*) INT_TRAPA44,
// 45 TRAPA (User Vecter)
(void*) INT_TRAPA45,
// 46 TRAPA (User Vecter)
(void*) INT_TRAPA46,
// 47 TRAPA (User Vecter)
(void*) INT_TRAPA47,
// 48 TRAPA (User Vecter)
(void*) INT_TRAPA48,
// 49 TRAPA (User Vecter)
(void*) INT_TRAPA49,
// 50 TRAPA (User Vecter)
(void*) INT_TRAPA50,
// 51 TRAPA (User Vecter)
(void*) INT_TRAPA51,
// 52 TRAPA (User Vecter)
(void*) INT_TRAPA52,
// 53 TRAPA (User Vecter)
(void*) INT_TRAPA53,
// 54 TRAPA (User Vecter)
(void*) INT_TRAPA54,
// 55 TRAPA (User Vecter)
(void*) INT_TRAPA55,
// 56 TRAPA (User Vecter)
(void*) INT_TRAPA56,
// 57 TRAPA (User Vecter)
(void*) INT_TRAPA57,
// 58 TRAPA (User Vecter)
(void*) INT_TRAPA58,
// 59 TRAPA (User Vecter)
(void*) INT_TRAPA59,
// 60 TRAPA (User Vecter)
(void*) INT_TRAPA60,
// 61 TRAPA (User Vecter)
(void*) INT_TRAPA61,
// 62 TRAPA (User Vecter)
(void*) INT_TRAPA62,
// 63 TRAPA (User Vecter)
(void*) INT_TRAPA63,
// 64 Interrupt IRQ0
(void*) INT_IRQ0,
// 65 Interrupt IRQ1
(void*) INT_IRQ1,
// 66 Interrupt IRQ2
(void*) INT_IRQ2,
// 67 Interrupt IRQ3
(void*) INT_IRQ3,
// 68 Interrupt IRQ4
(void*) INT_IRQ4,
// 69 Interrupt IRQ5
(void*) INT_IRQ5,
// 70 Interrupt IRQ6
(void*) INT_IRQ6,
// 71 Interrupt IRQ7
(void*) INT_IRQ7,
// 72 DMAC0 DEI0
(void*) INT_DMAC0_DEI0,
// 73 Reserved
(void*) Dummy,
// 74 Reserved
(void*) Dummy,
// 75 Reserved
(void*) Dummy,
// 76 DMAC1 DEI1
(void*) INT_DMAC1_DEI1,
// 77 Reserved
(void*) Dummy,
// 78 Reserved
(void*) Dummy,
// 79 Reserved
(void*) Dummy,
// 80 DMAC3 DEI2
(void*) INT_DMAC3_DEI2,
// 81 Reserved
(void*) Dummy,
// 82 Reserved
(void*) Dummy,
// 83 Reserved
(void*) Dummy,
// 84 DMAC3 DEI3
(void*) INT_DMAC3_DEI3,
// 85 ReservedB
(void*) Dummy,
// 86 Reserved
(void*) Dummy,
// 87 Reserved
(void*) Dummy,
// 88 MTU0 TGI0A
(void*) INT_MTU0_TGI0A,
// 89 MTU0 TGI0B
(void*) INT_MTU0_TGI0B,
// 90 MTU0 TGI0C
(void*) INT_MTU0_TGI0C,
// 91 MTU0 TGI0D
(void*) INT_MTU0_TGI0D,
// 92 MTU0 TCI0V
(void*) INT_MTU0_TCI0V,
// 93 Reserved
(void*) Dummy,
// 94 Reserved
(void*) Dummy,
// 95 Reserved
(void*) Dummy,
// 96 MTU1 TGI1A
(void*) INT_MTU1_TGI1A,
// 97 MTU1 TGI1B
(void*) INT_MTU1_TGI1B,
// 98 Reserved
(void*) Dummy,
// 99 Reserved
(void*) Dummy,
// 100 MTU1 TCI1V
(void*) INT_MTU1_TCI1V,
// 101 MTU1 TCI1U
(void*) INT_MTU1_TCI1U,
// 102 Reserved
(void*) Dummy,
// 103 Reserved
(void*) Dummy,
// 104 MTU2 TGI2A
(void*) INT_MTU2_TGI2A,
// 105 MTU2 TGI2B
(void*) INT_MTU2_TGI2B,
// 106 Reserved
(void*) Dummy,
// 107 Reserved
(void*) Dummy,
// 108 MTU2 TCI2V
(void*) INT_MTU2_TCI2V,
// 109 MTU2 TCI2U
(void*) INT_MTU2_TCI2U,
// 110 Reserved
(void*) Dummy,
// 111 Reserved
(void*) Dummy,
// 112 MTU3 TGI3A
(void*) INT_MTU3_TGI3A,
// 113 MTU3 TGI3B
(void*) INT_MTU3_TGI3B,
// 114 MTU3 TGI3C
(void*) INT_MTU3_TGI3C,
// 115 MTU3 TGI3D
(void*) INT_MTU3_TGI3D,
// 116 MTU3 TCI3V
(void*) INT_MTU3_TCI3V,
// 117 Reserved
(void*) Dummy,
// 118 Reserved
(void*) Dummy,
// 119 Reserved
(void*) Dummy,
// 120 MTU4 TGI4A
(void*) INT_MTU4_TGI4A,
// 121 MTU4 TGI4B
(void*) INT_MTU4_TGI4B,
// 122 MTU4 TGI4C
(void*) INT_MTU4_TGI4C,
// 123 MTU4 TGI4D
(void*) INT_MTU4_TGI4D,
// 124 MTU4 TCI4V
(void*) INT_MTU4_TCI4V,
// 125 Reserved
(void*) Dummy,
// 126 Reserved
(void*) Dummy,
// 127 Reserved
(void*) Dummy,
// 128 SCI0 ERI0
(void*) INT_SCI0_ERI0,
// 129 SCI0 RXI0
(void*) INT_SCI0_RXI0,
// 130 SCI0 TXI0
(void*) INT_SCI0_TXI0,
// 131 SCI0 TEI0
(void*) INT_SCI0_TEI0,
// 132 SCI1 ERI1
(void*) INT_SCI1_ERI1,
// 133 SCI1 RXI1
(void*) INT_SCI1_RXI1,
// 134 SCI1 TXI1
(void*) INT_SCI1_TXI1,
// 135 SCI1 TEI1
(void*) INT_SCI1_TEI1,
// 136 A/D ADI0
(void*) INT_ADI0,
// 137 A/D ADI1
(void*) INT_ADI1,
// 138 Reserved
(void*) Dummy,
// 139 Reserved
(void*) Dummy,
// 140 DTC SWDTCE
(void*) INT_DTC_SWDTCE,
// 141 Reserved
(void*) Dummy,
// 142 Reserved
(void*) Dummy,
// 143 Reserved
(void*) Dummy,
// 144 CMT0 CMI0
(void*) INT_CMT0_CMI0,
// 145 Reserved
(void*) Dummy,
// 146 Reserved
(void*) Dummy,
// 147 Reserved
(void*) Dummy,
// 148 CMT1 CMI1
(void*) INT_CMT1_CMI1,
// 149 Reserved
(void*) Dummy,
// 150 Reserved
(void*) Dummy,
// 151 Reserved
(void*) Dummy,
// 152 WDT ITI
(void*) INT_WDT_ITI,
// 153 BSC CMI
(void*) INT_BSC_CMI,
// 154 Reserved
(void*) Dummy,
// 155 Reserved
(void*) Dummy,
// 156 I/O OEI
(void*) INT_OEI,
// 157 Reserved
(void*) Dummy,
// 158 Reserved
(void*) Dummy,
// 159 Reserved
(void*) Dummy,
// 160 Reserved
(void*) Dummy,
// 161 Reserved
(void*) Dummy,
// 162 Reserved
(void*) Dummy,
// 163 Reserved
(void*) Dummy,
// 164 Reserved
(void*) Dummy,
// 165 Reserved
(void*) Dummy,
// 166 Reserved
(void*) Dummy,
// 167 Reserved
(void*) Dummy,
// 168 Reserved
(void*) Dummy,
// 169 Reserved
(void*) Dummy,
// 170 Reserved
(void*) Dummy,
// 171 Reserved
(void*) Dummy,
// 172 Reserved
(void*) Dummy,
// 173 Reserved
(void*) Dummy,
// 174 Reserved
(void*) Dummy,
// 175 Reserved
(void*) Dummy,
// 176 Reserved
(void*) Dummy,
// 177 Reserved
(void*) Dummy,
// 178 Reserved
(void*) Dummy,
// 179 Reserved
(void*) Dummy,
// 180 Reserved
(void*) Dummy,
// 181 Reserved
(void*) Dummy,
// 182 Reserved
(void*) Dummy,
// 183 Reserved
(void*) Dummy,
// 184 Reserved
(void*) Dummy,
// 185 Reserved
(void*) Dummy,
// 186 Reserved
(void*) Dummy,
// 187 Reserved
(void*) Dummy,
// 188 Reserved
(void*) Dummy,
// 189 Reserved
(void*) Dummy,
// 190 Reserved
(void*) Dummy,
// 191 Reserved
(void*) Dummy,
// 192 Reserved
(void*) Dummy,
// 193 Reserved
(void*) Dummy,
// 194 Reserved
(void*) Dummy,
// 195 Reserved
(void*) Dummy,
// 196 Reserved
(void*) Dummy,
// 197 Reserved
(void*) Dummy,
// 198 Reserved
(void*) Dummy,
// 199 Reserved
(void*) Dummy,
// 200 Reserved
(void*) Dummy,
// 201 Reserved
(void*) Dummy,
// 202 Reserved
(void*) Dummy,
// 203 Reserved
(void*) Dummy,
// 204 Reserved
(void*) Dummy,
// 205 Reserved
(void*) Dummy,
// 206 Reserved
(void*) Dummy,
// 207 Reserved
(void*) Dummy,
// 208 Reserved
(void*) Dummy,
// 209 Reserved
(void*) Dummy,
// 210 Reserved
(void*) Dummy,
// 211 Reserved
(void*) Dummy,
// 212 Reserved
(void*) Dummy,
// 213 Reserved
(void*) Dummy,
// 214 Reserved
(void*) Dummy,
// 215 Reserved
(void*) Dummy,
// 216 Reserved
(void*) Dummy,
// 217 Reserved
(void*) Dummy,
// 218 Reserved
(void*) Dummy,
// 219 Reserved
(void*) Dummy,
// 220 Reserved
(void*) Dummy,
// 221 Reserved
(void*) Dummy,
// 222 Reserved
(void*) Dummy,
// 223 Reserved
(void*) Dummy,
// 224 Reserved
(void*) Dummy,
// 225 Reserved
(void*) Dummy,
// 226 Reserved
(void*) Dummy,
// 227 Reserved
(void*) Dummy,
// 228 Reserved
(void*) Dummy,
// 229 Reserved
(void*) Dummy,
// 230 Reserved
(void*) Dummy,
// 231 Reserved
(void*) Dummy,
// 232 Reserved
(void*) Dummy,
// 233 Reserved
(void*) Dummy,
// 234 Reserved
(void*) Dummy,
// 235 Reserved
(void*) Dummy,
// 236 Reserved
(void*) Dummy,
// 237 Reserved
(void*) Dummy,
// 238 Reserved
(void*) Dummy,
// 239 Reserved
(void*) Dummy,
// 240 Reserved
(void*) Dummy,
// 241 Reserved
(void*) Dummy,
// 242 Reserved
(void*) Dummy,
// 243 Reserved
(void*) Dummy,
// 244 Reserved
(void*) Dummy,
// 245 Reserved
(void*) Dummy,
// 246 Reserved
(void*) Dummy,
// 247 Reserved
(void*) Dummy,
// 248 Reserved
(void*) Dummy,
// 249 Reserved
(void*) Dummy,
// 250 Reserved
(void*) Dummy,
// 251 Reserved
(void*) Dummy,
// 252 Reserved
(void*) Dummy,
// 253 Reserved
(void*) Dummy,
// 254 Reserved
(void*) Dummy,
// 255 Reserved
(void*) Dummy
};
T168_111\core\SH7040文件：第1~12个文件
最新推荐文章于 2024-08-16 23:08:28 发布
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