先上代码:
/*
功能描述:按下按键后,对应的LED亮起,在数码管上显示按下的数
*/
module vote(
LED1,LED2,LED3,SEG_DATA,SEG_EN,
KEY1,KEY2,KEY3
);
input KEY1,KEY2,KEY3;//按键输入引脚
output LED1,LED2,LED3;//LED输出引脚
output reg [6:0] SEG_DATA;//7位数据引脚,加reg是因为要在always里面进行操作
output [3:0] SEG_EN;//使能引脚
//数据参数
parameter SEG_NUM0 = 7'h3f, //数字0
SEG_NUM1 = 7'h06, //数字1
SEG_NUM2 = 7'h5b, //数字2
SEG_NUM3 = 7'h4f; //数字3
always @(*)
begin
case ({KEY1,KEY2,KEY3})
3'b000: SEG_DATA[6:0]=SEG_NUM0;
3'b001: SEG_DATA[6:0]=SEG_NUM1;
3'b010: SEG_DATA[6:0]=SEG_NUM1;
3'b011: SEG_DATA[6:0]=SEG_NUM2;
3'b100: SEG_DATA[6:0]=SEG_NUM1;
3'b101: SEG_DATA[6:0]=SEG_NUM2;
3'b110: SEG_DATA[6:0]=SEG_NUM2;
3'b111: SEG_DATA[6:0]=SEG_NUM3;
default:SEG_DATA[6:0]=SEG_NUM0;
endcase
end
assign LED1=!KEY1;
assign LED2=!KEY2;
assign LED3=!KEY3;
assign SEG_EN[3:0]=4'b0111;
endmodule
这边有以下几点可以总结
1.output reg [6:0] SEG_DATA;是因为用在always中,采用reg属性,另一个就无需增加
2.其次,output [3:0] SEG_EN;代表4位,类似数组,其实也可以改成output [4:1] SEG_EN;此时在引脚分配上就是出现4个引脚SEG_EN[0]…
3.case ({KEY1,KEY2,KEY3})里面代表的是总线,相当于三个信号凑在一起表达,然后需要注意就是, default必须写
4.always内是一个顺序执行模式,这种是行为级别的描述,通过要做的事情来描述,还有RTL描述,利用assign ,是通过功能的表达式,比如F=AB+BC这种方式,而最基本的是门级,就是纯粹描述电路,先搭建个与门然后或门这种
5.assign 记得写
tcl文件的引脚分配
package require ::quartus::project
set_location_assignment PIN_N3 -to LED1
set_location_assignment PIN_P3 -to LED2
set_location_assignment PIN_K6 -to LED3
set_location_assignment PIN_M1 -to KEY1
set_location_assignment PIN_M2 -to KEY2
set_location_assignment PIN_L4 -to KEY3
set_location_assignment PIN_M9 -to SEG_EN[3]
set_location_assignment PIN_L9 -to SEG_EN[2]
set_location_assignment PIN_K10 -to SEG_EN[1]
set_location_assignment PIN_K9 -to SEG_EN[0]
set_location_assignment PIN_K8 -to SEG_DATA[0]
set_location_assignment PIN_L7 -to SEG_DATA[1]
set_location_assignment PIN_M7 -to SEG_DATA[2]
set_location_assignment PIN_L6 -to SEG_DATA[3]
set_location_assignment PIN_N8 -to SEG_DATA[4]
set_location_assignment PIN_L8 -to SEG_DATA[5]
set_location_assignment PIN_M8 -to SEG_DATA[6]
set_location_assignment PIN_P8 -to SEG_DATA[7]