- 博客(31)
- 收藏
- 关注
原创 图像增强算法:对比度增强算法以及MATLAB实现
对比度增强是一种提高明暗差异的算法,使亮的更亮,暗的更暗。文章以指数对比度增强为例,介绍其计算公式以及MATLAB的实现
2026-01-13 09:16:13
225
原创 vivado报错及解决【七】
[Labtools 27-3428] Ila core [hw_ila_1] clock has stopped. Unable to arm ILA core.
2025-11-07 16:06:17
358
原创 Synthesis Attributes【上】
(* ASYNC_REG = "TRUE" *)(* black_box *) (* cascade_height = 4 *)(* clock_buffer_type = "none" *)(* direct_enable = "yes" *)(* direct_reset = "yes" *)(* CRITICAL_SIG_OPT = “true” *)(* DONT_TOUCH = "yes" *)(* dsp_folding = "yes" *)
2025-09-19 15:51:54
1096
原创 vivado中synthesis以及implementation中各strategy模式的解释
vivado中synthesis以及implementation中各strategy模式的解释
2025-09-19 15:47:52
975
原创 vivado压缩.bit/.bin下载文件
[Labtools 27-3347] Flash Programming Unsuccessful: Program File Size cannot be greater than part size
2025-08-14 11:09:02
314
原创 vivado报错及解决【六】
[Chipscope 16-302] Could not generate core for dbg_hub. Aborting IP Generation operaion. The current Vivado temporary directory path
2025-07-05 11:40:30
628
原创 vivado报错及解决【五】
ERROR: [Common 17-39] 'connect_hw_server' failed due to earlier errors.
2025-07-05 11:29:27
298
原创 vivado报错及解决【四】
[filemgmt 20-1731] Too many checkpoints files associated with the sub-design
2025-07-05 11:22:31
516
原创 vivado报错及解决【三】
[Place 30-126] Unroutable Placement! A BUFIO can only drive loads in the same IO bank. The following BUFIO clock loads are placed too far from the BUFIO to be routable.
2025-06-10 17:39:47
532
原创 vivado报错及解决【二】
[DRC REQP-1884] ODDR_has_invalid_load: ODDR cell ODDR_p0_0 loads should only be an output buffer or a port, but it is driving an invalid load
2025-05-10 14:15:35
1033
原创 vivado报错及解决【一】
[DRC MDRV-1] Multiple Driver Nets: Net pk_port0/<const0> has multiple drivers: pk_port0/GND/G, dvi_inst/img_rdata[25]_INST_0/O, dvi_inst/img_rdata[26]_INST_0/O, dvi_inst/img_rdata[24]_INST_0/O, dvi_inst/img_rdata[28]_INST_0/O, dvi_inst/img_rdata[29]_INST_0
2025-04-25 11:06:00
1942
原创 vivado仿真位数问题
2.因为仿真波形默认列出的是testbench中出现的变量,而我们在功能模块中已经定义了此变量(如图1),只需要将功能模块中的变量添加到仿真波形中(如图4),就不会出现变量只有1位的问题。上述问题就是因为在功能模块中定义了此wire变量,但是在testbench中未定义,仿真波形默认列出testbench中出现的变量,未定义的变量就会被默认只有一位。今天分享一个使用vivado仿真时,定义的变量明明是16位(如图1),但是仿真波形中该变量只有1位(如图2)的问题。
2025-03-27 10:34:23
434
空空如也
空空如也
TA创建的收藏夹 TA关注的收藏夹
TA关注的人
RSS订阅
1