题目十二:脉冲按键电话按键显示电路设计(平台实现)

题目十二:脉冲按键电话按键显示电路设计(平台实现)

题目要求:设计一个具有8位显示的电话按键显示器,显示器应能正确反映按键数字,接通后能显示通话时间。

\1) 显示器显示从低位向高位前移,逐位显示按键数字,最低位为当前显示位,八位数字输入完毕后,电话接通,直到有接听信号输入,若一直没有接听,10秒钟后,自动挂断,显示器清除显示,直到有新号码输入。

\2) 用电平信号1作为拿起话筒的信号,用K0—K6作为0—6的数字按键进行拨号;数码管显示从低位向高位前移,逐位显示按键数字,最低位为当前显示位,八位数字输入完毕后,电话接通,指示灯1亮。

\3) 用一电平信号2作为接通信号,接通后用指示灯1闪烁显示正在通话中;

\4) 设计一个计时电路,接通清除电话号码显示,数码管显示通话时间,精确到秒;显示格式:时.分.秒,即” xx.xx.xx”。

\5) 自己挂断或者对方挂断,计时结束,显示总通话时长。

选做部分:设计一个寄存器,存放最后一次拨的电话号码,用K7作为重拨按键,当拿起话筒时,按重拨键,数码管逐位显示最后一次的电话号码。

设备及其软件情况

板子:flex epf10k20tc144-4

软件:quartus ||

语言:VHDL

设计思路:

一:输入输出模块

​ 整个输入输出思路是 按键k->BCD码->BCD进入寄存器->寄存器扫描改变set->将set翻译成段选信号,显示

二:状态判断模块

、根据使能信号a1( 话筒 ),a2( 接听 ),cntt( 已拨打的号码数 )来判断当前所处状态,并映射到相应的信号量上。

三:移位寄存器扫描模块

在状态判断模块使用的状态信号量的控制下(timer=1代表已接通)将寄存器的值放在set中

四:数码管显示模块

总体上通过控制段选信号(smg)和位选信号(sel)来控制数码管。

运用到动态扫描技术来同时显示数码管。

输出模块根据状态信号量来控制输出。

具体实现:

0: 所用的信号量分析

输入port:

     k:in std_logic_vector(7 downto 0);//按键信号做号码输入
	 clk:in std_logic;//100hz的时钟信号,分频做计时的时钟信号
	 clk9:in std_logic;//动态扫描的时钟信号(我认为动态的原因)
	 smg:out std_logic_vector(6 downto 0);//数码管的段选信号
	 sel:out std_logic_vector(7 downto 0);//数码管的位选信号
	 led:out std_logic;//输出灯来显示当前状态(1->等待接听信号,1·0跳变->通话中
	 a1:in std_logic;//话筒信号
	 a2:in std_logic);//接听信号

中间量(各个进程的信号量)

signal BCD:std_logic_vector(3 downto 0);//将按键k翻译成BCD码
signal set:std_logic_vector(3 downto 0);//用来存放寄存器扫描的结果
signal key:std_logic;//判断是否应该扫描寄存器
signal key1:std_logic;//k发生变化
type array1 is array(7 downto 0)of std_logic_vector(3 downto 0);
signal array2 :array1;//移位寄存器
signal c1:std_logic;//时间计数器的进位
signal c2:std_logic;//时间计数器的进位
signal q01:std_logic_vector(3 downto 0):="0000";//放时间
signal q02:std_logic_vector(3 downto 0):="0000";//放时间
signal q11:std_logic_vector(3 downto 0):="0000";//放时间
signal clock1:std_logic_vector(3 downto 0):="0000";//锁存
signal clock2:std_logic_vector(3 downto 0):="0000";//锁存
signal clock3:std_logic_vector(3 downto 0):="0000";//锁存
Signal cnt: integer range 0 to 7:=0;//随clk动态变化,是动态扫描的基础

临时信号

signal clk1_temp:std_logic;//clk1(10s)的临时量
signal clk2_temp:std_logic;//clk2(1s)的临时量
signal recall_temp:std_logic:='0';//复位信号的临时量
signal led_test:std_logic;//灯的临时量
signal x:std_logic_vector(6 downto 0);//段选信号的临时量

时钟信号

clk:in std_logic;//100hz的时钟信号,分频做计时的时钟信号
clk9:in std_logic;//动态扫描的时钟信号(我认为动态的原因)
signal clk1:std_logic;//10s(由clk分频得来)
signal clk2:std_logic;//1s(由clk分频得来)

状态信号量

signal timer:std_logic:='0';//当接通时timer=1,
signal flag:std_logic:='0';//flag=1 表示出现过接通的状态
signal flag1:std_logic:='0';//判断是否到了显示通话(已结束)时间
signal recall:std_logic:='0';//复位信号
signal b1:std_logic:='1';//判断是否是出于按了号码没有接听信号
Signal cntt: integer range 0 to 9;//所按的号码的数目

一:输入输出模块

用按钮k0~k6做号码输入(同时用了计数器防抖),具体思路为k的变动引起BCD信号量的变化,再将BCD保存在移位寄存器中。

图片显示

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代码:

​ k->bcd

process(k)
     Begin
	 if k(0)='0' then BCD<="0000";
	 elsif k(1)='0' then BCD<="0001";
	 elsif k(2)='0' then BCD<="0010";
	 elsif k(3)='0' then BCD<="0011";
	 elsif k(4)='0' then BCD<="0100";
	 elsif k(5)='0' then BCD<="0101";
	 elsif k(6)='0' then BCD<="0110";
	 else BCD<="0000";
	end if;
	if k(7)='0' then recall_temp<='1';
	else recall_temp<='0';
	end if;
	end process;

BCD->寄存器(通过key)

process(key,b1)
	 begin
	 if b1='0' then
	 array2(7)<= "0000";
	 array2(6)<= "0000";
	 array2(5)<= "0000";
	 array2(4)<= "0000";
	 array2(3)<= "0000";
	 array2(2)<= "0000";
	 array2(1)<= "0000";
	 array2(0)<= "0000";
	 cntt<=0;
	 else
	 if falling_edge(key) then
	 array2(7)<= array2(6);
	 array2(6)<= array2(5);
	 array2(5)<= array2(4);
	 array2(4)<= array2(3);
	 array2(3)<= array2(2);
	 array2(2)<= array2(1);
	 array2(1)<= array2(0);
	 array2(0)<= BCD;
	 cntt<=cntt+1;
	 end if;
	 end if;
	 end process;

二:状态判断模块

b1判断是否是出于按了号码没有接听信号

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process(cntt,clk1,a2)
	begin
	if cntt>=8 then
	      if a2='0' then
	         if clk1'event and clk1='1'then
	         b1<='0';
			end if;
	       end if;
	 else
	   b1<='1';
	end if;
	end process;
  • timer:std_logic:=‘0’;//当接通时timer=1,

  • flag:std_logic:=‘0’;//flag=1 表示出现过接通的状态

  • flag1:std_logic:=‘0’;//判断是否到了显示通话(已结束)时间

  • recall:std_logic:=‘0’;//复位信号

  • b1:std_logic:=‘1’;//判断是否是出于按了号码没有接听信号

  • cntt: integer range 0 to 9;//所按的号码的数目

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process(cntt,a2)
	begin
	if flag1='1' then
		led_test<='0';
    else
	if a2='1' then
	 if cntt>=8 then 
	     led_test<=clk2;
	     timer<='1';
	 else
	   led_test<='0';
	   timer<='0';
	end if;
	end if;
	if a2='0' then
	 if cntt>=8 then
	     led_test<='1';
	     timer<='0';
	 else
	   led_test<='0';
	   timer<='0';
	end if;
	end if;
	end if;
	end process;
	
	process(timer)
	begin
	if timer='1' then  flag<='1';
	end if;
	end process;
	
	process(flag)
	begin
	if flag='1' then  
	 if a1='0'then
	 flag1<='1';
	 end if;
	 if a2='0' then
     flag1<='1';
     end if;
    else
	 flag1<='0';
	end if;
	end process;
	

三:移位寄存器扫描模块

 case cnt IS
      when 0=> set<=array2(0);sel<="11111110";
      when 1=> set<=array2(1);sel<="11111101";
      when 2=> set<=array2(2);sel<="11111011";
      when 3=> set<=array2(3);sel<="11110111";
      when 4=> set<=array2(4);sel<="11101111";
      when 5=> set<=array2(5);sel<="11011111";
      when 6=> set<=array2(6);sel<="10111111";
      when 7=> set<=array2(7);sel<="01111111";
      when others=>NULL;
    End case;

四:数码管显示模块

set的输出

根据状态信号量的不同,将输出分成几种

1.输出寄存器的内容(

  • if recall=‘0’ then//无重拨信号
  • if flag1=‘0’ then//不用显示通话(已结束)时间
  • if timer=‘0’ and flag='0’then//电话没接通 )
case cnt IS
      when 0=> set<=array2(0);sel<="11111110";
      when 1=> set<=array2(1);sel<="11111101";
      when 2=> set<=array2(2);sel<="11111011";
      when 3=> set<=array2(3);sel<="11110111";
      when 4=> set<=array2(4);sel<="11101111";
      when 5=> set<=array2(5);sel<="11011111";
      when 6=> set<=array2(6);sel<="10111111";
      when 7=> set<=array2(7);sel<="01111111";
      when others=>NULL;
    End case;

2.输出正在通话时间(

  • if recall=‘0’ then//无重拨信号
  • if flag1=‘0’ then//不用显示通话(已结束)时间
  • if timer =1
case cnt IS
      when 0=> set<=q01;sel<="11111110";
      when 1=> set<=q02;sel<="11111101";
      when 2=> set<=q11;sel<="11111011";
      when 3=> set<="0000";sel<="11110111";
      when 4=> set<="0000";sel<="11101111";
      when 5=> set<="0000";sel<="11011111";
      when others=>NULL;
      end case;

3.输出通话(已结束)时间

if recall=‘0’ then//无重拨信号

if flag1=‘1’ then

  case cnt IS
      when 0=> set<=clock1;sel<="11111110";
      when 1=> set<=clock2;sel<="11111101";
      when 2=> set<=clock3;sel<="11111011";
      when 3=> set<="0000";sel<="11110111";
      when 4=> set<="0000";sel<="11101111";
      when 5=> set<="0000";sel<="11011111";
      when others=>NULL;
      end case;	

4.输出号码

  • if recall=‘1’ then//重拨信号

      case cnt IS
      when 0=> set<=array2(0);sel<="11111110";
      when 1=> set<=array2(1);sel<="11111101";
      when 2=> set<=array2(2);sel<="11111011";
      when 3=> set<=array2(3);sel<="11110111";
      when 4=> set<=array2(4);sel<="11101111";
      when 5=> set<=array2(5);sel<="11011111";
      when 6=> set<=array2(6);sel<="10111111";
      when 7=> set<=array2(7);sel<="01111111";
      when others=>NULL;
      end case;
set->x;x->smg
 process(set)
	BEGIN
	case set is
	when "0000"=>x<="1111110";
	when "0001"=>x<="0110000";
	when "0010"=>x<="1101101";
	when "0011"=>x<="1111001";
	when "0100"=>x<="0110011";
	when "0101"=>x<="1011011";
	when "0110"=>x<="1011111";
	when "0111"=>x<="1110000";
	when "1000"=>x<="1111111";
	when "1001"=>x<="1110011";
	when others=>NULL;
	end case;
	end process;
	smg<=x;

输出总代码在下文

五:特别模块的实现

1.原始的动态扫描代码(老师给的,也是我代码的思路源泉)

lIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
USE IEEE.STD_LOGIC_UNSIGNED.all;
Entity led is
  Port(clk: IN STD_LOGIC;
       ledag:OUT STD_LOGIC_VECTOR(7 downto 0);
       Bt:OUT STD_LOGIC_VECTOR(7 downto 0) );
End led;
Architecture arc of led Is
Signal cnt8: integer range 0 to 7;
Signal a:integer range 0 to 7;
--Signal clk_tmp:STD_LOGIC;
Begin 
P1:process(cnt8)
  Begin
    case cnt8 IS
      when 0=> BT<="11111110";A<=0;
      when 1=> BT<="11111101";A<=1;
      when 2=> BT<="11111011";A<=2;
      when 3=> BT<="11110111";A<=3;
      when 4=> BT<="11101111";A<=4;
      when 5=> BT<="11011111";A<=5;
      when 6=> BT<="10111111";A<=6;
      when 7=> BT<="01111111";A<=7;
      when others=>NULL;
    End case;
  end process p1;
 P2:process(clk)
  Begin
    if clk'event and clk='1' then
        if cnt8=7 then
           cnt8<=0;
         else cnt8<=cnt8+1;
         end if;
     end if;
   End process P2;
 P3:process(A)
    Begin
       Case A Is
          when 0 => ledag <="11111100";--`0
          when 1 => ledag <="01100000";--ʾ1
          when 2 => ledag <="11011010";--ʾ2
          when 3 => ledag <="11110010";--ʾ3
          when 4 => ledag <="01100110";--ʾ4
          when 5 => ledag <="10110110";--ʾ5
          when 6 => ledag <="10111110";--ʾ6
          when 7 => ledag <="11100000";--ʾ7
          when  others => null;
       End case;
     End Process P3;
End arc;

2.时钟的分频(我想得到1s和10s的时钟信号,计数器)

代码:

​ clk2(10s)

     process(clk)
     	variable count_3:integer range 0 to 1000;
     Begin
         if rising_edge(clk) then
             if count_3=50 then
                       count_3:=0;
                       clk2_temp<=not clk2_temp;
            else
                        count_3:=count_3+1;         
            end if;               
         end if;
     End process;
     
     clk2<=clk2_temp;
     
   

​ clk1(1s)

  process(clk2)
     variable count_2:integer range 0 to 1000;
     Begin
         if rising_edge(clk2) then
             if count_2=10 then
                       count_2:=0;
                       clk1_temp<=not clk1_temp;
            else
                        count_2:=count_2+1;         
            end if;               
         end if;
     End process;
     
     clk1<=clk1_temp;

3.输入的防抖(计数器)

​ BCD码进入寄存器(判断key信号并不是key1信号)

    key1<=(k(0)and k(1)and k(2)and k(3)and k(4)and k(5)and k(6));
	process(clk,k)
	 variable count_1:integer range 0 to 100000;
	begin
	if rising_edge(clk) then
	if count_1<25 then
                        count_1:=count_1+1;
                       else
                        count_1:=count_1;
                       end if;
	if count_1<=24 then
		key<=key;
	else
	    key<=key1;
	  end if;
	  end if;
	 end process;

4显示正在通话的时间

秒是通过一个十进制计数器(有向高的进位)和六进制计数器(有向高的进位和来自低的进位)组成的

    process(clk2,timer)
	begin
	if timer='1' then
	 if clk2'event and clk2='1' then
	  if q01<9 then  q01<=q01+1;
	  else q01<="0000";
	  end if;
	 end if;
	end if;
	end process;
	
    process(q01)
	begin
	 if q01="1001" then 
	 c1<='1';
	 else c1<='0';
	end if;
	end process;
        
	process(c1)
	begin
	 if c1='1' then  q02<=q02+1;end if;
	 if q02="0110" then q02<="0000";end if;
 	end process;
         
    process(q02)
	begin
	 if q02="0110" then 
	 c2<='1';
	 else c2<='0';
	end if;
	end process;
        
	process(c2)
	begin
	 if c2='1' then  q11<=q11+1;end if;
	 end process;

显示

case cnt IS
      when 0=> set<=q01;sel<="11111110";
      when 1=> set<=q02;sel<="11111101";
      when 2=> set<=q11;sel<="11111011";
      when 3=> set<="0000";sel<="11110111";
      when 4=> set<="0000";sel<="11101111";
      when 5=> set<="0000";sel<="11011111";
      when others=>NULL;
      end case;	

5.显示通话(已完成)的时间(锁存器)

process(flag1,clk)
	begin
	if clk'event and clk='1' then
    IF flag1='0' THEN 
    clock1<=q01;
    clock2<=q02;
    clock3<=q11;
    end if;
    end if;
	end process;

显示

case cnt IS
      when 0=> set<=clock1;sel<="11111110";
      when 1=> set<=clock2;sel<="11111101";
      when 2=> set<=clock3;sel<="11111011";
      when 3=> set<="0000";sel<="11110111";
      when 4=> set<="0000";sel<="11101111";
      when 5=> set<="0000";sel<="11011111";
      when others=>NULL;
      end case;			

小缺点

缺点:

  • k7作为recall重拨信号,如果在拨号码时按了k7,就会跳过计时阶段,数码管直接显示刚刚按的号码

  • 没有设计复位功能,一旦出错必须重新下载到板子上

完整代码

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity tset2 is
port(k:in std_logic_vector(7 downto 0);
	 clk:in std_logic;
	 clk9:in std_logic;
	 smg:out std_logic_vector(6 downto 0);
	 sel:out std_logic_vector(7 downto 0);
	 led:out std_logic;
	 a1:in std_logic;
	 a2:in std_logic);
end tset2;
architecture one of tset2 is
signal x:std_logic_vector(6 downto 0);
signal BCD:std_logic_vector(3 downto 0);
signal set:std_logic_vector(3 downto 0);
signal key:std_logic;
signal key1:std_logic;
type array1 is array(7 downto 0)of std_logic_vector(3 downto 0);
signal array2 :array1;
Signal cnt: integer range 0 to 7:=0;
Signal cntt: integer range 0 to 9;
signal b1:std_logic:='1';
signal led_test:std_logic;
signal clk1:std_logic;
signal clk2:std_logic;
signal clk1_temp:std_logic;
signal clk2_temp:std_logic;
signal timer:std_logic:='0';
signal q01:std_logic_vector(3 downto 0):="0000";
signal q02:std_logic_vector(3 downto 0):="0000";
signal q11:std_logic_vector(3 downto 0):="0000";
signal clock1:std_logic_vector(3 downto 0):="0000";
signal clock2:std_logic_vector(3 downto 0):="0000";
signal clock3:std_logic_vector(3 downto 0):="0000";
signal c1:std_logic;
signal c2:std_logic;
signal flag:std_logic:='0';
signal flag1:std_logic:='0';
signal recall:std_logic:='0';
signal recall_temp:std_logic:='0';

begin
     process(k)
     Begin
	 if k(0)='0' then BCD<="0000";
	 elsif k(1)='0' then BCD<="0001";
	 elsif k(2)='0' then BCD<="0010";
	 elsif k(3)='0' then BCD<="0011";
	 elsif k(4)='0' then BCD<="0100";
	 elsif k(5)='0' then BCD<="0101";
	 elsif k(6)='0' then BCD<="0110";
	 else BCD<="0000";
	end if;
	if k(7)='0' then recall_temp<='1';
	else recall_temp<='0';
	end if;
	end process;
	
	process(recall_temp)
	begin
	if recall_temp='1' then recall<='1';end if;
	end process;
	
	key1<=(k(0)and k(1)and k(2)and k(3)and k(4)and k(5)and k(6));
	process(clk,k)
	 variable count_1:integer range 0 to 100000;
	begin
	if rising_edge(clk) then
	if count_1<25 then
                        count_1:=count_1+1;
                       else
                        count_1:=count_1;
                       end if;
	if count_1<=24 then
		key<=key;
	else
	    key<=key1;
	  end if;
	  end if;
	 end process;
	 
	 process(key,b1)
	 begin
	 if b1='0' then
	 array2(7)<= "0000";
	 array2(6)<= "0000";
	 array2(5)<= "0000";
	 array2(4)<= "0000";
	 array2(3)<= "0000";
	 array2(2)<= "0000";
	 array2(1)<= "0000";
	 array2(0)<= "0000";
	 cntt<=0;
	 else
	 if falling_edge(key) then
	 array2(7)<= array2(6);
	 array2(6)<= array2(5);
	 array2(5)<= array2(4);
	 array2(4)<= array2(3);
	 array2(3)<= array2(2);
	 array2(2)<= array2(1);
	 array2(1)<= array2(0);
	 array2(0)<= BCD;
	 cntt<=cntt+1;
	 end if;
	 end if;
	 end process;
	 
	 process(clk9)
     Begin
     if clk9'event and clk9='1' then
        if cnt=7 then
           cnt<=0;
         else cnt<=cnt+1;
         end if;
     end if;
     End process;
     
     process(clk)
     variable count_3:integer range 0 to 1000;
     Begin
         if rising_edge(clk) then
             if count_3=50 then
                       count_3:=0;
                       clk2_temp<=not clk2_temp;
            else
                        count_3:=count_3+1;         
            end if;               
         end if;
     End process;
     
     clk2<=clk2_temp;
     
     process(clk2)
     variable count_2:integer range 0 to 1000;
     Begin
         if rising_edge(clk2) then
             if count_2=10 then
                       count_2:=0;
                       clk1_temp<=not clk1_temp;
            else
                        count_2:=count_2+1;         
            end if;               
         end if;
     End process;
     
     clk1<=clk1_temp;
     
     
    process(cntt,clk1,a2)
	begin
	if cntt>=8 then
	      if a2='0' then
	         if clk1'event and clk1='1'then
	         b1<='0';
			end if;
	       end if;
	 else
	   b1<='1';
	end if;
	end process;
	
	process(cntt,a2)
	begin
	if flag1='1' then
		led_test<='0';
    else
	if a2='1' then
	 if cntt>=8 then 
	     led_test<=clk2;
	     timer<='1';
	 else
	   led_test<='0';
	   timer<='0';
	end if;
	end if;
	if a2='0' then
	 if cntt>=8 then
	     led_test<='1';
	     timer<='0';
	 else
	   led_test<='0';
	   timer<='0';
	end if;
	end if;
	end if;
	end process;
	
	process(timer)
	begin
	if timer='1' then  flag<='1';
	end if;
	end process;
	
	process(flag)
	begin
	flag1<='0';
	if flag='1' then  
	 if a1='0'then
	 flag1<='1';
	 end if;
	 if a2='0' then
     flag1<='1';
     end if;
    else
	 flag1<='0';
	end if;
	end process;
	
    process(clk2,timer)
	begin
	if timer='1' then
	 if clk2'event and clk2='1' then
	  if q01<9 then  q01<=q01+1;
	  else q01<="0000";
	  end if;
	 end if;
	end if;
	 end process;
	
	process(q01)
	begin
	 if q01="1001" then 
	 c1<='1';
	 else c1<='0';
	end if;
	end process;
	
	process(c1)
	begin
	 if c1='1' then  q02<=q02+1;end if;
	 if q02="0110" then q02<="0000";end if;
 	end process;
	
	process(q02)
	begin
	 if q02="0110" then 
	 c2<='1';
	 else c2<='0';
	end if;
	end process;
	
	process(c2)
	begin
	 if c2='1' then  q11<=q11+1;end if;
	 end process;
	
	process(flag1,clk)
	begin
	if clk'event and clk='1' then
    IF flag1='0' THEN 
    clock1<=q01;
    clock2<=q02;
    clock3<=q11;
    end if;
    end if;
	end process;
	
	led<=led_test;
	
    process(cnt,a1,timer)
    Begin
    if recall='0' then
    if flag1='0' then
    if timer='0' and flag='0'then 
    if a1='0' then
    sel<="11111111";
    else
    case cnt IS
      when 0=> set<=array2(0);sel<="11111110";
      when 1=> set<=array2(1);sel<="11111101";
      when 2=> set<=array2(2);sel<="11111011";
      when 3=> set<=array2(3);sel<="11110111";
      when 4=> set<=array2(4);sel<="11101111";
      when 5=> set<=array2(5);sel<="11011111";
      when 6=> set<=array2(6);sel<="10111111";
      when 7=> set<=array2(7);sel<="01111111";
      when others=>NULL;
    End case;
    end if;
    end if;
    if timer='1' then 
    case cnt IS
      when 0=> set<=q01;sel<="11111110";
      when 1=> set<=q02;sel<="11111101";
      when 2=> set<=q11;sel<="11111011";
      when 3=> set<="0000";sel<="11110111";
      when 4=> set<="0000";sel<="11101111";
      when 5=> set<="0000";sel<="11011111";
      when others=>NULL;
      end case;
      end if;

    else-----flag1=1
      case cnt IS
      when 0=> set<=clock1;sel<="11111110";
      when 1=> set<=clock2;sel<="11111101";
      when 2=> set<=clock3;sel<="11111011";
      when 3=> set<="0000";sel<="11110111";
      when 4=> set<="0000";sel<="11101111";
      when 5=> set<="0000";sel<="11011111";
      when others=>NULL;
      end case;				
      end if;
      end if;
     if recall='1' then
      case cnt IS
      when 0=> set<=array2(0);sel<="11111110";
      when 1=> set<=array2(1);sel<="11111101";
      when 2=> set<=array2(2);sel<="11111011";
      when 3=> set<=array2(3);sel<="11110111";
      when 4=> set<=array2(4);sel<="11101111";
      when 5=> set<=array2(5);sel<="11011111";
      when 6=> set<=array2(6);sel<="10111111";
      when 7=> set<=array2(7);sel<="01111111";
      when others=>NULL;
    End case;
    end if;
  end process;
  
   process(set)
	BEGIN
	case set is
	when "0000"=>x<="1111110";
	when "0001"=>x<="0110000";
	when "0010"=>x<="1101101";
	when "0011"=>x<="1111001";
	when "0100"=>x<="0110011";
	when "0101"=>x<="1011011";
	when "0110"=>x<="1011111";
	when "0111"=>x<="1110000";
	when "1000"=>x<="1111111";
	when "1001"=>x<="1110011";
	when others=>NULL;
	end case;
	end process;
	smg<=x;
end one;



  end case;				
  end if;
  end if;
 if recall='1' then
  case cnt IS
  when 0=> set<=array2(0);sel<="11111110";
  when 1=> set<=array2(1);sel<="11111101";
  when 2=> set<=array2(2);sel<="11111011";
  when 3=> set<=array2(3);sel<="11110111";
  when 4=> set<=array2(4);sel<="11101111";
  when 5=> set<=array2(5);sel<="11011111";
  when 6=> set<=array2(6);sel<="10111111";
  when 7=> set<=array2(7);sel<="01111111";
  when others=>NULL;
End case;
end if;

end process;

process(set)
BEGIN
case set is
when “0000”=>x<=“1111110”;
when “0001”=>x<=“0110000”;
when “0010”=>x<=“1101101”;
when “0011”=>x<=“1111001”;
when “0100”=>x<=“0110011”;
when “0101”=>x<=“1011011”;
when “0110”=>x<=“1011111”;
when “0111”=>x<=“1110000”;
when “1000”=>x<=“1111111”;
when “1001”=>x<=“1110011”;
when others=>NULL;
end case;
end process;
smg<=x;
end one;


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