数据及指令对齐(align)

数据对齐：
Note that words need not be aligned at even-numbered addresses and doublewords need not be aligned at addresses evenly divisible by four. This allows maximum flexibility in data structures (e.g., records containing mixed byte, word, and doubleword items) and efficiency in memory utilization. When used in a configuration with a 32-bit bus, actual transfers of data between processor and memory take place in units of doublewords beginning at addresses evenly divisible by four; however, the processor converts requests for misaligned words or doublewords into the appropriate sequences of requests acceptable to the memory interface. Such misaligned data transfers reduce performance by requiring extra memory cycles. For maximum performance, data structures (including stacks) should be designed in such a way that, whenever possible, word operands are aligned at even addresses and doubleword operands are aligned at addresses evenly divisible by four.
注意，字（word）在偶数地址处以及双字（double word）在可被4整除的地址处不需要对齐。这给结构体（比如包含混合了字节、字和双字的结构体）带来了极大的弹性并且让内存的使用更有效。当使用32位总线结构时，数据在处理器和内存中实际的传输是开始于能被4整除的地址，并且以双字为单位。因此，处理器将未对齐的字和双字的请求转换成存储接口可接受的请求。由于转换需要额外的内存周期，对于任意一个未对齐的数据传输将造成性能下降。为了最大化性能，数据结构(包括堆栈)必须设计成这样一种方式：只要可能，字操作数对齐到偶地址处，双字操作数对齐到能被4整除的地址处。

指令对齐：
Due to instruction prefetching and queuing within the CPU, there is no requirement for instructions to be aligned on word or doubleword boundaries. (However, a slight increase in speed results if the target addresses of control transfers are evenly divisible by four.)
由于CPU中的指令预读取和队列的存在，指令不需要对齐在字或双字的边界上。(但是，如果控制转移的地址在能被4整除的地址上，将会有微小的速度提升)。