JetPack4.2.2系统上修改TX2配置为配置3

于 2019-11-02 11:16:28 发布
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分类专栏： Jetson-tx2 嵌入式linux驱动 JetPack4.2.2 文章标签： TX2 JetPack4.2.2 配置3 config #3 TX2配置模式
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本文链接：https://blog.csdn.net/rendog/article/details/102869116
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NVIDIA JetPack4.2.2 新版本系统上修改Jetson-TX2配置为配置3

  • 简述
    NVIDIA Jetson 的系统版本升级后它的配置方式和驱动等都发生了变化，若是想修改默认配置为配置3，就不能按照JetPack4之前的版本来修改了，在这里为各位分享我在新版本系统上修改配置3的方法。
    图1
    配置3：使能2个USB3.0和3个PCIe

设置步骤

  • 修改ODMDATA值，将文件p2771-0000.conf.common中的ODMDATA修改为0x6090000 .
	local board_id="${1}";
	local board_version="${2}";
	local board_sku="${3}";
	local board_revision="${4}";
	local bdv=${board_version^^};
	local bid=${board_id^^};
	local uboot_build=500;
	local fromfab="-a00";
	local tofab="-c03";		# default = C03
	local pmicfab="-c00";		# default = C00
	local bpfdtbfab="-c00";		# default = C00
	local tbcdtbfab="-c03";		# default = C03
	local kerndtbfab="-c03";	# default = C03
	ODMDATA=0x6090000;		# default = C0X
  • 修改tegra186-quill-p3310-1000-a00-00-base.dts文件，更改如下：
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
	xhci@3530000 {
		status = "okay";
		phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
			<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
			<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
			<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>;
		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-1";
	};
#else
	xhci@3530000 {
		status = "okay";
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>;
		phy-names = "utmi-0", "utmi-1", "utmi-2", "usb3-1";
		nvidia,boost_cpu_freq = <800>;
	};
#endif

#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
	xusb_padctl@3520000 {
		status = "okay";
		pinctrl-0 = <&vbus_en0_default_state>;
		pinctrl-1 = <&vbus_en1_default_state>;
		pinctrl-2 = <&vbus_en0_sfio_tristate_state>;
		pinctrl-3 = <&vbus_en1_sfio_tristate_state>;
		pinctrl-4 = <&vbus_en0_sfio_passthrough_state>;
		pinctrl-5 = <&vbus_en1_sfio_passthrough_state>;
		pinctrl-names = "vbus_en0_default", "vbus_en1_default",
			"vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate",
			"vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough";

		pads {
			usb2 {
				lanes {
					usb2-0 {
						nvidia,function = "xusb";
						status = "okay";
					};
					usb2-1 {
						nvidia,function = "xusb";
						status = "okay";
					};
					usb2-2 {
						nvidia,function = "xusb";
						status = "okay";
					};
				};
			};
			usb3 {
				lanes {
					usb3-0 {
						nvidia,function = "xusb";
						status = "okay";
					};
					usb3-1 {
						nvidia,function = "xusb";
						status = "okay";
					};
					usb3-2 {
						nvidia,function = "xusb";
						status = "okay";
					};
				};
			};
		};

		ports {
			usb2-0 {
				status = "okay";
				mode = "otg";
				vbus-supply = <&vdd_usb0_5v>;
				nvidia,oc-pin = <0>;
			};
			usb2-1 {
				status = "okay";
				mode = "host";
				vbus-supply = <&vdd_usb1_5v>;
				nvidia,oc-pin = <1>;
			};
			usb2-2 {
				status = "okay";
				mode = "host";
				vbus-supply = <&battery_reg>;//modify :org-vdd_usb2_5v
				nvidia,oc-pin = <1>;//add 
			};
			usb3-1 {
				nvidia,usb2-companion = <1>;
				status = "okay";
				//add -s
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				nvidia,lanes = "otg-2";
				//add -e
			};
		};
	};
#endif
	pinctrl@3520000 {
		status = "okay";
		pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
		pinctrl-1 = <&vbus_en0_sfio_tristate_state>;
		pinctrl-2 = <&vbus_en1_sfio_tristate_state>;
		pinctrl-3 = <&vbus_en0_sfio_passthrough_state>;
		pinctrl-4 = <&vbus_en1_sfio_passthrough_state>;
		pinctrl-5 = <&vbus_en0_default_state>;
		pinctrl-6 = <&vbus_en1_default_state>;
		pinctrl-names = "default",
			"vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate",
			"vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough",
			"vbus_en0_default", "vbus_en1_default";
		tegra_xusb_padctl_pinmux_default: pinmux {
			/* Quill does not support usb3-micro AB */
			usb2-micro-AB {
				nvidia,lanes = "otg-0";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
				nvidia,oc-pin = <0>;
			};
			usb2-std-A-port2 {
				nvidia,lanes = "otg-1";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				nvidia,oc-pin = <1>;
			};			
			usb3-std-A-port2 {
				nvidia,lanes = "usb3-0";//modify  :org- usb3-1
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				nvidia,oc-pin = <1>;
			};
            //add :usb3-std-A-port3
			usb3-std-A-port3 {
				nvidia,lanes = "usb3-1";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				nvidia,oc-pin = <1>;
			};

			e3325-usb3-std-A-HS {
				nvidia,lanes = "otg-2";
				nvidia,function = "xusb";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "okay";//modify  :org-disabled
			};

			e3325-usb3-std-A-SS {
				nvidia,lanes = "usb3-0";
				nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
				status = "disabled";
			};
		};
	};
	pcie-controller@10003000 {
		status = "okay";
		pci@1,0 {
			nvidia,num-lanes = <2>;
			status = "okay";
		};
		pci@2,0 {
			nvidia,num-lanes = <1>;
			status = "okay";//modify :org-disabled
		};
		pci@3,0 {
			nvidia,num-lanes = <1>;
			status = "okay";
		};
	};
  • 修改tegra186-quill-p3310-1000-a00-plugin-manager.dtsi文件，注释掉以下程序段，更改如下：
//modify 
		/*
		fragment-500-pcie-config {
			ids = ">=3310-1000-500";
			override@0 {
				target = <&tegra_pcie>;
				_overlay_ {
					pci@1,0 {
						nvidia,num-lanes = <4>;
					};
					pci@2,0 {
						nvidia,num-lanes = <0>;
					};
					pci@3,0 {
						nvidia,num-lanes = <1>;
					};
				};
			};
		};
		*/

/*modify 
		fragment-500-e3325-pcie {
			enable-override-on-all-matches;
			ids = ">=3310-1000-500";
			odm-data = "enable-pcie-on-uphy-lane0";
			override@0 {
				target = <&{/xhci@3530000}>;
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
				_overlay_ {
					phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
						<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
						<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>;
					phy-names = "usb2-0", "usb2-1", "usb2-2";
				};
#else
				_overlay_ {
					phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
						<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
						<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>;
					phy-names = "utmi-0", "utmi-1", "utmi-2";
				};
#endif
			};
			override@1 {
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
				target = <&xusb_padctl>;
				_overlay_ {
					ports {
						usb3-0 {
							status = "disabled";
						};
					};
				};
#else
				target = <&tegra_xusb_padctl_pinmux_default>;
				_overlay_ {
					usb3-std-A-port2 {
						status = "disabled";
					};
				};
#endif
			};

			override@2 {
				target = <&tegra_main_gpio>;
				_overlay_ {
					pcie0_lane2_mux {
						status = "okay";
					};
				};
			};
		};*/
  • 修改tegra186-quill-p3310-1000-c03-00-base.dts文件，更改如下：
gpio@2200000 {
		sdmmc-wake-support-input {
			status = "okay";
		};

		sdmmc-wake-support-output {
			status = "okay";
		};
		//add : pcie0_lane2_mux
		pcie0_lane2_mux{
			status = "okay";
		};
	};

pcie-controller@10003000 {
		pci@1,0 {
			nvidia,num-lanes = <2>;//modify :org-4
			nvidia,disable-clock-request;
			status = "okay";//add 
		};
		pci@2,0 {
			nvidia,num-lanes = <1>;//modify :org-0
			status = "okay";//add 
		};
		pci@3,0 {
			nvidia,num-lanes = <1>;
			status = "okay";//add 
		};
	};

        xhci@3530000 {
		phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
			<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>;
		phy-names = "utmi-0", "utmi-1", "utmi-2", "usb3-0";
	};
  • 修改tegra186-quill-power-tree-p3310-1000-a00-00.dtsi文件，更改如下：
pinctrl@3520000 {
		vbus-0-supply = <&vdd_usb0_5v>;
		vbus-1-supply = <&vdd_usb1_5v>;
		vbus-2-supply = <&battery_reg>;//modify :org-vdd_usb2_5v
		vbus-3-supply = <&vdd_usb2_5v>;//modify :org-battery_reg
		vddio-hsic-supply = <&battery_reg>;
		avdd_usb-supply = <&spmic_sd3>;
		vclamp_usb-supply = <&spmic_sd2>;
		avdd_pll_erefeut-supply = <&spmic_sd2>;
	};

以上修改完成，重新将内核代码编译后，再将设备树和镜像烧录到TX2中。

sudo ./flash.sh -r -K kernel/Image -d kernel/dtb/tegra186-quill-p3310-1000-c03-00-base.dtb -o 0x6090000 p2771-0000.conf.common jetson-tx2 mmcblk0p1

测试验证

由于设计的PCIe是连接的百兆以太网网卡，所以在系统网络设置里会看到三个外扩的可用的以太网（电路设计的是外扩3个），连上网线测试可以上网。2个USB都可以接鼠标键盘U盘等设备。

RMBR
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