Intel and AMD Manuals

Intel Manuals

http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html

The Intel Corporation provides many useful documents on the Pentium 4 Processor Technical Documentation page. Especially useful for helping you to understand the machine dependent code of Minix on an IBM-PC compatible machine will be the Manuals section. As of October 2004 the following manuals are available as PDF files (read with Adobe Acrobat or Ghostview):

• IA-32 Intel. Architecture Optimization Reference Manual
• IA-32 Intel. Architecture and Intel. Extended Memory 64 Software Developer's Manual Documentation Changes
• IA-32 Intel Architecture Software Developer's Manual Volume 1: Basic Architecture
• IA-32 Intel Architecture Software Developer's Manual Volume 2A: Instruction Set Reference, A-M
• IA-32 Intel Architecture Software Developer's Manual Volume 2B: Instruction Set Reference, N-Z
• IA-32 Intel Architecture Software Developer's Manual Volume 3: System Programming Guide
• The Software Optimization Cookbook

These are all downloadable as PDF files (read with Adobe Acrobat or Ghostview). A CD-ROM containing the complete set of manuals can also be ordered from Intel.

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AMD Manuals

All AMD processors for IBM-PC have the same IA-32 architecture as Intel processors. The differences are in multimedia technology, where AMD processors have 3DNOW! and other things... And the next AMD processor (x86-64) will be different, but still compatible with IA-32. So, the Intel docs will also help you understand and program for AMD processors. But, AMD provides manuals too -- they are available at the AMD64 Architecture Tech Docs page. These AMD manuals were available as of October 2004:

• AMD64 Architecture Programmer's Manual Volume 1: Application Programming
• AMD64 Architecture Programmer's Manual Volume 2: System Programming
• AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions
• AMD64 Architecture Programmer's Manual Volume 4: 128-Bit Media Instructions
• AMD64 Architecture Programmer's Manual Volume 5: 64-Bit Media and x87 Floating-Point Instructions

Note that the syntax of the assembly language used in Minix is different from Intel's. The Minix syntax is consistent with assembly languages used by other Unix-derived systems. Other links on the Programming in the Minix environment page on the Minix1 websites point to articles describing assembly language syntax.

Intel Virtual Machine eXtension (VMX)

VMX Lifecycle

VMXON -> (VMENTRY -> VMEXIT)* ->VMXOFF

VM Control Data Structures VMCS

A logical processor uses virtual-machine control data structures (VMCSs) while it is in VMX operation.

• Guest-state area. Processor state is saved into the guest-state area on VM exits and loaded from there on VM entries.
• Host-state area. Processor state is loaded from the host-state area on VM exits.
• VM-execution control fields. These fields control processor behavior in VMX non-root operation. They determine in part the causes of VM exits.
• VM-exit control fields. These fields control VM exits.
• VM-entry control fields. These fields control VM entries.
• VM-exit information fields. These fields receive information on VM exits and describe the cause and the nature of VM exits. They are read-only.

VM Entry (VMX root -> VMX non-root)

Software can enter VMX non-root operation using either of the VM-entry instructions VMLAUNCH and VMRESUME. VMLAUNCH can be used only with a VMCS whose launch state is clear and VMRESUME can be used only with a VMCS whose the launch state is launched. VMLAUNCH should be used for the first VM entry after VMCLEAR; VMRESUME should be used for subsequent VM entries with the same VMCS.

Each VM entry performs the following steps in the order indicated:

1. check
2. load processor state from the guest-state area,
3. load MSRs from the VM-entry MSR-load area

VM Exit (VMX non-root -> VMX root)

VM exits occur in response to certain instructions and events in VMX non-root operation, depend on (event/instuction, vm_config)

VM exits perform the following operations:

1. Information about the cause of the VM exit is recorded in the VM-exit information fields and VM-entry control fields are modified
2. Processor state is saved in the guest-state area
3. MSRs may be saved in the VM-exit MSR-store area
4. Processor state is loaded based in part on the host-state area and some VM-exit controls
5. MSRs may be loaded from the VM-exit MSR-load area

VMX Instruction Review

VMCS Related

• VMPTRLD/VMPTRST: vmcs pointer load and store
• VMCLEAR: inactive vmcs
• VMREAD/VMWRITE: vmcs r/w

VMX Management

• VMLAUNCH: first vm entry, vmcs clear -> vmcs launched
• VMRESUME: subsequent vm entry
• VMXOFF/VMXON: VMX mode on/off

TLB-management

• INVEPT/INVVPID: invalidates entries in the TLBs and paging-structure caches that were derived from extended page tables (EPT), or based on a Virtual-Processor Identifier (VPID).

Guest Instructions

• VMCALL: call the VMM for service, a VM exit occurs.
• VMFUNC: invoke a VM function without a VM exit.

Address Translation Support

• Virtual Processor Identifier (VPIDS): TLB label for virtual processor
• Extended Page Table (EPT): guest-physical addresses -> physical address

Virtual Machine Monitor (VMM)

The Virtual Machine Monitor (VMM) is a software class used to manage virtual
machines (VM). The VMM software layer runs at the most privileged level and
has complete ownership of the underlying system hardware. The VMM controls
creation of a VM, transfers control to a VM, and manages situations that can cause
transitions between the guest VMs and host VMM. The VMM allows the VMs to share
the underlying hardware and yet provides isolation between the VMs. The guest software
executing in a VM is unaware of any transitions that might have occurred
between the VM and its host.

Reference

• Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3 (3A, 3B & 3C): System Programming Guide