海思HI3518ev200处理器uboot分析

程序启动的第一阶段：
G:\u-boot-2010.06\arch\arm\cpu\hi3518ev200\start.S

.globl _start
_start: b   reset

reset:
    /*
     * set the cpu to SVC32 mode
     */
    mrs r0, cpsr
    bic r0, r0, #0x1f
    orr r0, r0, #0xd3
    msr cpsr,r0
    /*
     * we do sys-critical inits only at reboot,
     * not when booting from ram!
     */

    /*
     * flush v4 I/D caches
     */
    mov r0, #0
    mcr p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
    mcr p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
    /*
     * disable MMU stuff and caches
     */
    mrc p15, 0, r0, c1, c0, 0
    bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
    bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
    orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
    mcr p15, 0, r0, c1, c0, 0

    /*
     *  read system register REG_SC_GEN2
         *  check if ziju flag
     */
    ldr r0, =SYS_CTRL_REG_BASE
    ldr r1, [r0, #REG_SC_GEN2]
    ldr r2, =0x7a696a75          /* magic for "ziju" */
    cmp r1, r2
    bne normal_start_flow
    mov r1, sp                   /* save sp */
    str r1, [r0, #REG_SC_GEN2]  /* clear ziju flag */

    /* init PLL/DDRC/pin mux/... */
    ldr r0, _blank_zone_start
    ldr r1, _TEXT_BASE
    sub r0, r0, r1
    ldr r1, =RAM_START_ADRS
    add r0, r0, r1
    mov r1, #0x0                 /* flags: 0->normal 1->pm */
    bl  init_registers           /* init PLL/DDRC/... */

arch/arm/cpu/hi3518ev200/lowlevel_init_svb.s

程序启动的第二阶段：

程序启动的第三阶段：
G:\u-boot-2010.06\common\main.c

void main_loop (void)
{

}