- 博客(0)
- 资源 (2)
- 收藏
- 关注
HY27US08121A手册
FEATURES SUMMARY
HIGH DENSITY NAND Flash MEMORIES
- Cost effective solutions for mass storage applications
NAND INTERFACE
- x8 or x16 bus width.
- Multiplexed Address/ Data
- Pinout compatibility for all densities
SUPPLY VOLTAGE
- 3.3V device: VCC = 2.7 to 3.6V : HY27USXX121A
- 1.8V device: VCC = 1.7 to 1.95V : HY27SSXX121A
Memory Cell Array
= (512+16) Bytes x 32 Pages x 4,096 Blocks
= (256+8) Words x 32 pages x 4,096 Blocks
PAGE SIZE
- x8 device : (512 + 16 spare) Bytes
: HY27(U/S)S08121A
- x16 device: (256 + 8 spare) Words
: HY27(U/S)S16121A
BLOCK SIZE
- x8 device: (16K + 512 spare) Bytes
- x16 device: (8K + 256 spare) Words
PAGE READ / PROGRAM
- Random access: 3.3V: 12us (max.)
1.8V: 15us (max.)
- Sequential access: 3.3V device: 50ns (min.)
1.8V device: 60ns (min.)
- Page program time: 200us (typ.)
COPY BACK PROGRAM MODE
- Fast page copy without external buffering
FAST BLOCK ERASE
- Block erase time: 2ms (Typ.)
STATUS REGISTER
ELECTRONIC SIGNATURE
- 1st cycle : Manufacturer Code
- 2nd cycle: Device Code
CHIP ENABLE DON'T CARE
- Simple interface with microcontroller
AUTOMATIC PAGE 0 READ AT POWER-UP OPTION
- Boot from NAND support
- Automatic Memory Download
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
- Program/Erase locked during Power transitions
DATA INTEGRITY
- 100,000 Program/Erase cycles
(with 1bit/512byte ECC)
- 10 years Data Retention
PACKAGE
- HY27(U/S)S(08/16)121A-T(P)
: 48-Pin TSOP1 (12 x 20 x 1.2 mm)
- HY27(U/S)S(08/16)121A-T (Lead)
- HY27(U/S)S(08/16)121A-TP (Lead Free)
- HY27(U/S)S(08/16)121A-S(P)
: 48-Pin USOP1 (12 x 17 x 0.65 mm)
- HY27(U/S)S(08/16)121A-S (Lead)
- HY27(U/S)S(08/16)121A-SP (Lead Free)
- HY27(U/S)S(08/16)121A-F(P)
: 63-Ball FBGA (9 x 11 x 1.0 mm)
- HY27(U/S)S(08/16)121A-F (Lead)
- HY27(U/S)S(08/16)121A-FP (Lead Free
2010-01-25
空空如也
TA创建的收藏夹 TA关注的收藏夹
TA关注的人