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原创 不支持ssl功能的libcurl库交叉编译,附下载链接

不支持ssl功能的libcurl库交叉编译,附下载链接libcurl简介交叉编译libcurl库libcurl库的下载链接 libcurl简介 libcurl主要功能就是用不同的协议连接和沟通不同的服务器~也就是相当封装了的sockPHP 支持libcurl(允许你用不同的协议连接和沟通不同的服务器)。 libcurl当前支持http, https, ftp, gopher, telnet, di...

2019-05-13 16:16:05 413

http_c_20210816.zip

基于C语言实现的http库,不依赖其它库,编译简单,有常见的使用例程,可用C语言轻松实现http服务器等功能。

2021-08-16

linux设备驱动详解.zip

基于linux内核4.0版本的linux设备驱动详解 PDF版,高清版,可自由复制。

2019-05-13

STM32H7手册中文版.zip

STM32H743中文参考手册,带有详细的目录。便于快速了解STM32H7系列功能。

2019-05-13

Qt Creater快速入门(第三版.zip

QT Creater快速入门书籍和源码,书籍带有详细的书签便于阅读。

2019-05-13

MSP432用户手册

MSP432 低功耗高性能并存10.1 Digital I/O Introduction The digital I/O features include: • Independently programmable individual I/Os • Any combination of input or output • Individually configurable interrupts for ports (available for certain ports only) • Independent input and output data registers • Individually configurable pullup or pulldown resistors • Wake-up capability from ultra-low power modes (available for certain ports only) • Individually configurable high drive I/Os (available for certain I/Os only) Devices within the family may have up to eleven digital I/O ports implemented (P1 to P10 and PJ). Most ports contain eight I/O lines; however, some ports may contain less (see the device-specific data sheet for ports available). Each I/O line is individually configurable for input or output direction, and each can be individually read or written. Each I/O line is individually configurable for pullup or pulldown resistors. Certain ports have interrupt and wake-up capability from ultra-low power modes (see device specific data sheet for ports with interrupt and wake-up capability). Each interrupt can be individually enabled and configured to provide an interrupt on a rising or falling edge of an input signal. All interrupts are fed into an encoded Interrupt Vector register, allowing the application to determine which sub-pin of a port has generated the event. Individual ports can be accessed as byte-wide ports or can be combined into half-word-wide ports. Port pairs P1 and P2, P3 and P4, P5 and P6, P7 and P8, and so on, are associated with the names PA, PB, PC, PD, and so on, respectively. All port registers are handled in this manner with this naming convention. The main exception are the interrupt vector registers, for example, interrupts for ports P1 and P2 must be handled through P1IV and P2IV, PAIV does not exist. When writing to port PA with half-word operations, all 16 bits are written to the port. When writing to the lower byte of port PA using byte operations,

2015-04-23

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