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Verilog
vela_yang
So we beat on,boats against the current
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在Sublime Text 3 中配置 Verilog语法环境
1、Crtl+Shift+P 或 菜单View(查看) 打开控制台 2、原创 2014-11-01 13:42:37 · 37082 阅读 · 1 评论 -
Verilog_例程笔记_流水灯&按键消抖
/*********************************/ reg [2:0]rLED_Out; always @ ( posedge CLK or negedge RSTn ) if( !RSTn ) rLED_Out else if( Count_MS == 10'd100 ) begin if( rL原创 2014-11-01 14:07:18 · 3806 阅读 · 0 评论