- 博客(0)
- 资源 (3)
- 收藏
- 关注
Complexity Effective Superscalar Processors.pdf
Processor Microarchitecture An Implementation Perspective
2021-10-23
Design Of Energy-Efficient Application-Specific Instruction Set Processors
As Moore’s law is expected to be valid for at least the next decade [212],
the capability and complexity of digital devices will continue to grow.
However, the growth in design productivity for digital circuits cannot
keep up with the technological growth [136]. This gap represents a
serious bottleneck for the implementation of new competitive devices.
Especially for embedded digital circuits, a shift from hardware to software
implementations is a solution to this issue. Increasing the software
part of a design improves the design productivity due to the simplicity
of the software implementation process and due to the increased design
reuse factor.
2018-04-28
Chip Multiprocessor Architecture Techniques to Improve Throughput and Latency
多处理器架构技术的介绍文档。Chip multiprocessors — also called multi-core microprocessors or CMPs for short — are
now the only way to build high-performance microprocessors, for a variety of reasons. Large
uniprocessors are no longer scaling in performance, because it is only possible to extract a
limited amount of parallelism from a typical instruction stream using conventional superscalar
instruction issue techniques. In addition, one cannot simply ratchet up the clock speed on
today’s processors, or the power dissipation will become prohibitive in all but water-cooled
systems. Compounding these problems is the simple fact that with the immense numbers
of transistors available on today’s microprocessor chips, it is too costly to design and debug
ever-larger processors every year or two.
2018-04-28
空空如也
TA创建的收藏夹 TA关注的收藏夹
TA关注的人