s3c2440init.s for ADS1.2

s3c2440init.s for ADS1.2

**************************注意*****************************
;
; 只支持ARM代码，不支持Thumb代码
; 只支持小端对齐格式
; 只支持simple映象布局，不要用scatter方式链接工程
; 如果是通过NAND启动，工程设置中RObase的值必须位于硬件的RAM空间中而且RAM必须有足够的空间存放整个程序，因为本程序会将整个映象文件搬移到以RObase开始的存储空间中
; 本代码会调用C程序中的Main()，注意大小写
;
; NAME: 2440INIT.S
; DESC: C start up codes

 GET ASM_header.inc

;定义常量Pre-defined constants
USERMODE    EQU     0x10
FIQMODE     EQU     0x11
IRQMODE     EQU     0x12
SVCMODE     EQU     0x13
ABORTMODE   EQU     0x17
UNDEFMODE   EQU     0x1b
MODEMASK    EQU     0x1f
NOINT       EQU     0xc0

SDRAM_CLEAR EQU     0x0
SDRAM_TEST  EQU     0x12345678

BIT_SELFREFRESH EQU (1<<22)


;为各模式分配堆栈长度 The location of stacks
UserStack   EQU (_STACK_BASEADDRESS-0x3800) ;0x33ff4800 ~ 
SVCStack    EQU (_STACK_BASEADDRESS-0x2800) ;0x33ff5800 ~ // 256 byte stack
UndefStack  EQU (_STACK_BASEADDRESS-0x2400) ;0x33ff5c00 ~
AbortStack  EQU (_STACK_BASEADDRESS-0x2000) ;0x33ff6000 ~
IRQStack    EQU (_STACK_BASEADDRESS-0x1000) ;0x33ff7000 ~
FIQStack    EQU (_STACK_BASEADDRESS-0x1000) ;0x33ff8000 ~ 



; 定义动态中断跳转的宏
; 用法：【行号 HANDLER 内存中存放跳转地址的某一字空间】
; 功能：在定义了isrLabel的地方，取出HandleLabel中的值然后跳转到这个值所代表的地址中去
;-------------------------------------------------------------------------
MACRO
$isrLabel HANDLER $HandleLabel

$isrLabel
sub sp,sp,#4 ; 先空出一个字的空间，待会要把PC填进去
stmfd sp!,{r0}
ldr     r0,=$HandleLabel; 载入跳转表地址
ldr     r0,[r0] ; 载入表中的内容，即目的地址
str     r0,[sp,#4]      ; 把目的地址作为PC压栈
ldmfd   sp!,{r0,pc}     ; 跳转
MEND



; 主程序开始
;---------------------------------------------------------------------------

IMPORT  |Image$$RO$$Base| ; Base of ROM code
IMPORT  |Image$$RO$$Limit|  ; End of ROM code (=start of ROM data)
IMPORT  |Image$$RW$$Base|   ; Base of RAM to initialise
IMPORT  |Image$$ZI$$Base|   ; Base and limit of area
IMPORT  |Image$$ZI$$Limit|  ; to zero initialise

IMPORT  Main    ; The main entry of C program

AREA    Init,CODE,READONLY

ENTRY

EXPORT __ENTRY
__ENTRY


; 复位入口
;---------------------------------------------------------------------------
ResetEntry

    b   ResetHandler  ;Reset
    b isrUndef ;handler for Undefined mode
b isrSWI ;handler for SWI interrupt
b isrPabort ;handler for PAbort
b isrDabort ;handler for DAbort
b . ;没对应的异常，没有针对的处理代码
b isrIRQ ;handler for IRQ interrupt
b isrFIQ ;handler for FIQ interrupt
b EnterPWDN ;

isrFIQ      HANDLER HandleFIQ
isrIRQ      HANDLER HandleIRQ
isrUndef    HANDLER HandleUndef
isrSWI      HANDLER HandleSWI
isrDabort   HANDLER HandleDabort
isrPabort   HANDLER HandlePabort



; IRQ中断入口
; 和其他异常不同，IRQ异常需要进一步确定子中断
; 探测是哪个外设引发了中断并根据跳转表中的目的地址进行跳转
;--------------------------------------------------------------------------
Isr_IRQ
sub sp,sp,#4       ; 先空出一个字的空间，待会要把PC填进去                                 
stmfd sp!,{r8-r9} ; r8 r9入栈                                                   
ldr r9,=INTOFFSET   ; 寄存器INTOFFSET中的值表示了是哪个外设引发的中断                        
ldr r9,[r9]         ; EINT0是第1个子中断,if INTOFFSET=0 then EINT0 occur                   
ldr r8,=HandleEINT0 ; 左移2位的目的是把子中断号换算成'字'偏移                              
add r8,r8,r9,lsl #2 ; 从中断跳转表中取出中断入口地址                                         
ldr r8,[r8]         ; 把这个地址充当PC,压入栈                                                
str r8,[sp,#8]      ; 跳转到各个外设中断处理程序                                           
ldmfd sp!,{r8-r9,pc}

LTORG

    


; reset代码段
;---------------------------------------------------------------------------

ResetHandler

ldr r0,=DSC1 ;设置引脚的驱动强度，第一版PCB必须，否则会造成数据不稳定，而且有些片外访问还会造成程序走飞
ldr r1,=0xFFF00000
str r1,[r0]
ldr r0,=DSC0
ldr r1,=0x3FF
str r1,[r0]

;关看门狗
ldr r0,=WTCON       ;watch dog disable
ldr r1,=0x0
str r1,[r0]

;关中断
ldr r0,=INTMSK
ldr r1,=0xffffffff  ;all interrupt disable
str r1,[r0]
ldr r0,=INTSUBMSK
ldr r1,=0x7fff ;all sub interrupt disable
str r1,[r0]

; 设置IRQ的总入口，这样C语言只需要管理子IRQ的入口
ldr r0,=HandleIRQ ;This routine is needed
ldr r1,=Isr_IRQ   ;if there isn't 'subs pc,lr,#4' at 0x18, 0x1c
str r1,[r0]

;To reduce PLL lock time, adjust the LOCKTIME register.
ldr r0,=LOCKTIME
ldr r1,=0xffffff
str r1,[r0]

; Setting value Fclk:Hclk:Pclk
ldr r0,=CLKDIVN
ldr r1,=CLKDIV_VAL ; 0=1:1:1, 1=1:1:2, 2=1:2:2, 3=1:2:4, 4=1:4:4, 5=1:4:8, 6=1:3:3, 7=1:3:6.
str r1,[r0]

; 设置CPU总线模式
;If HDIVN is not 0, the CPU bus mode has to be changed from the fast bus mode to the asynchronous bus mode using following instruction
[ CLKDIV_VAL>1 ; means Fclk:Hclk is not 1:1
mrc p15,0,r0,c1,c0,0 ; AsyncBusMode FCLK作为CPU时钟，如果不执行这段代码则HCLK作为CPU时钟
orr r0,r0,#0xc0000000 ;R1_nF:OR:R1_iA
mcr p15,0,r0,c1,c0,0
|
mrc p15,0,r0,c1,c0,0 ; FastBusMode
bic r0,r0,#0xc0000000 ;R1_iA:OR:R1_nF
mcr p15,0,r0,c1,c0,0
]

;Configure UPLL
ldr r0,=UPLLCON
ldr r1,=((U_MDIV<<12)+(U_PDIV<<4)+U_SDIV)  
str r1,[r0]
nop ; Caution: After UPLL setting, at least 7-clocks delay must be inserted for setting hardware be completed.
nop
nop
nop
nop
nop
nop
;Configure MPLL
ldr r0,=MPLLCON
ldr r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV)
str r1,[r0]
    
;Check if the boot is caused by the wake-up from SLEEP mode.
ldr r1,=GSTATUS2
ldr r0,[r1]
tst r0,#0x2
bne WAKEUP_SLEEP ;In case of the wake-up from SLEEP mode, go to SLEEP_WAKEUP handler.

;设置存储器控制器 Set memory control registers
;ldr r0,=SMRDATA ; ?为什么这句不行
adrl r0, SMRDATA ;be careful!, SMRDATA表在本文的最后，它根据表中的配置信息生成相应的存储器控制器初始化配置
ldr r1,=BWSCON ;BWSCON Address= 0x48000000
add r2, r0, #52 ;End address of SMRDATA 一共有13个配置寄存器，合52字节
0
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne %B0

;延时，等待存储器稳定工作 delay
mov r0, #&1000
1
subs r0, r0, #1
bne %B1

;为各模式初始化堆栈 Initialize stacks
bl InitStacks

;判断是从NAND启动还是从NOR启动
ldr r0, =BWSCON
ldr r0, [r0]
ands r0, r0, #6 ;OM[1:0] != 0, NOR FLash boot
bne copy_proc_beg ;don't read nand flash
adr r0, ResetEntry ;OM[1:0] == 0, NAND FLash boot
cmp r0, #0 ;程序起始地址不为0,说明当前在用Multi-ice调试 
bne copy_proc_beg ;don't read nand flash for boot


; 程序从NAND启动，把代码段拷贝到SDRAM中
;-------------------------------------------------------------------------------
nand_boot_beg
; 配置NAND控制器
mov r5, #NFCONF
;set timing value
ldr r0, =(7<<12)|(7<<8)|(7<<4)
str r0, [r5]
;enable control
ldr r0, =(0<<13)|(0<<12)|(0<<10)|(0<<9)|(0<<8)|(1<<6)|(1<<5)|(1<<4)|(1<<1)|(1<<0)
str r0, [r5, #4]

;读NAND ID，看看型号是否支持
bl ReadNandID
mov r6, #0
ldr r0, =0xec73
cmp r5, r0
beq %F1
ldr r0, =0xec75
cmp r5, r0
beq %F1
mov r6, #1
1
bl ReadNandStatus

;把NAND中地址0开始的内容搬移到ResetEntry（本程序入口地址，在ADS中指定）
mov r8, #0
ldr r9, =ResetEntry
2
ands r0, r8, #0x1f
bne %F3
mov r0, r8
bl CheckBadBlk
cmp r0, #0
addne r8, r8, #32
bne %F4 ; 是坏块，跳过
3
mov r0, r8 ; 源地址(位于NAND中且从地址0开始)
mov r1, r9 ; 目的地址(ResetEntry)
bl ReadNandPage
add r9, r9, #512
add r8, r8, #1
4
cmp r8, #256
bcc %B2

mov r5, #NFCONF ;关闭NandFlash控制器
ldr r0, [r5, #4]
bic r0, r0, #1
str r0, [r5, #4]
ldr pc, =copy_proc_beg




; 代码搬移，RW段初始化,注意：只支持ADS的simple映象布局，不要用scatter方式链接工程
;-------------------------------------------------------------------------------
copy_proc_beg
adr r0, ResetEntry
ldr r2, BaseOfRO
cmp r0, r2
ldreq r0, TopOfRO
beq InitRam
ldr r3, TopOfRO
0
ldmia r0!, {r4-r7}
stmia r2!, {r4-r7}
cmp r2, r3
bcc %B0 ; 搬移RO段

sub r2, r2, r3
sub r0, r0, r2

InitRam
ldr r2, BaseOfRW
ldr r3, BaseOfZI
0
cmp r2, r3
ldrcc r1, [r0], #4
strcc r1, [r2], #4
bcc %B0 ; 搬移RW段

mov r0, #0
ldr r3, EndOfZI
1
cmp r2, r3
strcc r0, [r2], #4
bcc %B1 ; 清空ZI段

; 终于进入C语言啦
bl Main ; 注意：C代码中不要出现小写的main，否则ADS会自动生成搬移代码、初始化堆栈、初始化运行库等代码段"__main"，产生冗余代码
b .



; 主程序结束
;------------------------------------------------------------------------------------------
; 以下是主程序调用的各个子程序




; 为各个处理器模式初始化堆栈
; Don't use DRAM,such as stmfd,ldmfd......
; SVCstack is initialized before
;------------------------------------------------------------------------------------------
InitStacks
;未定义指令异常
mrs r0,cpsr
bic r0,r0,#MODEMASK
orr r1,r0,#UNDEFMODE|NOINT
msr cpsr_cxsf,r1 ;UndefMode
ldr sp,=UndefStack ; UndefStack=0x33FF_5C00
;存储器访问出错
orr r1,r0,#ABORTMODE|NOINT
msr cpsr_cxsf,r1 ;AbortMode
ldr sp,=AbortStack ; AbortStack=0x33FF_6000
;IRQ
orr r1,r0,#IRQMODE|NOINT
msr cpsr_cxsf,r1 ;IRQMode
ldr sp,=IRQStack ; IRQStack=0x33FF_7000
;FIRQ
orr r1,r0,#FIQMODE|NOINT
msr cpsr_cxsf,r1 ;FIQMode
ldr sp,=FIQStack ; FIQStack=0x33FF_8000
;SVC 操作系统保护模式(由SWI指令引发)
bic r0,r0,#MODEMASK|NOINT
orr r1,r0,#SVCMODE
msr cpsr_cxsf,r1 ;SVCMode
ldr sp,=SVCStack ; SVCStack=0x33FF_5800

;USER mode has not be initialized.

mov pc,lr
;The LR register won't be valid if the current mode is not SVC mode.


; NAND访问函数
;-----------------------------------------------------------------------
ReadNandID
mov      r7,#NFCONF
ldr      r0,[r7,#4] ;NFChipEn();
bic      r0,r0,#2
str      r0,[r7,#4]
mov      r0,#0x90 ;WrNFCmd(RdIDCMD);
strb     r0,[r7,#8]
mov      r4,#0 ;WrNFAddr(0);
strb     r4,[r7,#0xc]
1 ;while(NFIsBusy());
ldr      r0,[r7,#0x20]
tst      r0,#1
beq      %B1
ldrb     r0,[r7,#0x10] ;id  = RdNFDat()<<8;
mov      r0,r0,lsl #8
ldrb     r1,[r7,#0x10] ;id |= RdNFDat();
orr      r5,r1,r0
ldr      r0,[r7,#4] ;NFChipDs();
orr      r0,r0,#2
str      r0,[r7,#4]
mov pc,lr

ReadNandStatus
mov r7,#NFCONF
ldr      r0,[r7,#4] ;NFChipEn();
bic      r0,r0,#2
str      r0,[r7,#4]
mov      r0,#0x70 ;WrNFCmd(QUERYCMD);
strb     r0,[r7,#8]
ldrb     r1,[r7,#0x10] ;r1 = RdNFDat();
ldr      r0,[r7,#4] ;NFChipDs();
orr      r0,r0,#2
str      r0,[r7,#4]
mov pc,lr

WaitNandBusy
mov      r0,#0x70 ;WrNFCmd(QUERYCMD);
mov      r1,#NFCONF
strb     r0,[r1,#8]
1 ;while(!(RdNFDat()&0x40));
ldrb     r0,[r1,#0x10]
tst      r0,#0x40
beq %B1
mov      r0,#0 ;WrNFCmd(READCMD0);
strb     r0,[r1,#8]
mov      pc,lr

CheckBadBlk
mov r7, lr
mov r5, #NFCONF

bic      r0,r0,#0x1f ;addr &= ~0x1f;
ldr      r1,[r5,#4] ;NFChipEn()
bic      r1,r1,#2
str      r1,[r5,#4]

mov      r1,#0x50 ;WrNFCmd(READCMD2)
strb     r1,[r5,#8]
mov      r1, #5;6 ;6->5
strb     r1,[r5,#0xc] ;WrNFAddr(5);(6) 6->5
strb     r0,[r5,#0xc] ;WrNFAddr(addr)
mov      r1,r0,lsr #8 ;WrNFAddr(addr>>8)
strb     r1,[r5,#0xc]
cmp      r6,#0 ;if(NandAddr)
movne    r0,r0,lsr #16 ;WrNFAddr(addr>>16)
strneb   r0,[r5,#0xc]

;don't use WaitNandBusy, after WaitNandBusy will read part A!
mov r0, #100
1
subs r0, r0, #1
bne %B1
2
ldr r0, [r5, #0x20]
tst r0, #1
beq %B2

ldrb r0, [r5,#0x10] ;RdNFDat()
sub r0, r0, #0xff

mov      r1,#0 ;WrNFCmd(READCMD0)
strb     r1,[r5,#8]

ldr      r1,[r5,#4] ;NFChipDs()
orr      r1,r1,#2
str      r1,[r5,#4]

mov pc, r7


; NAND读取函数，
; 入口参数：R0＝源地址(NAND中) R1＝目的地址(RAM中)
;------------------------------------------------------------
ReadNandPage
mov r7,lr
mov      r4,r1
mov      r5,#NFCONF

ldr      r1,[r5,#4] ;NFChipEn()
bic      r1,r1,#2
str      r1,[r5,#4]

mov      r1,#0 ;WrNFCmd(READCMD0)
strb     r1,[r5,#8]
strb     r1,[r5,#0xc] ;WrNFAddr(0)
strb     r0,[r5,#0xc] ;WrNFAddr(addr)
mov      r1,r0,lsr #8 ;WrNFAddr(addr>>8)
strb     r1,[r5,#0xc]
cmp      r6,#0 ;if(NandAddr)
movne    r0,r0,lsr #16 ;WrNFAddr(addr>>16)
strneb   r0,[r5,#0xc]

ldr      r0,[r5,#4] ;InitEcc()
orr      r0,r0,#0x10
str      r0,[r5,#4]

bl       WaitNandBusy ;WaitNFBusy()

mov      r0,#0 ;for(i=0; i<512; i++)
1
ldrb     r1,[r5,#0x10] ;  从NAND中连续获得512字节数据并送到从r4开始的512字节中
strb     r1,[r4,r0]
add      r0,r0,#1
bic      r0,r0,#0x10000
cmp      r0,#0x200
bcc      %B1

ldr      r0,[r5,#4] ; 关闭NAND片选信号
orr      r0,r0,#2
str      r0,[r5,#4]

mov pc,r7

LTORG
ALIGN





; 进入睡眠函数，由C语言从外部调用，调用形式：void EnterPWDN(int CLKCON)
; 1. SDRAM should be in self-refresh mode.
; 2. All interrupt should be maksked for SDRAM/DRAM self-refresh.
; 3. LCD controller should be disabled for SDRAM/DRAM self-refresh.
; 4. The I-cache may have to be turned on.
; 5. The location of the following code may have not to be changed.
;-----------------------------------------------------------------------

EnterPWDN
mov r2,r0 ;r2=rCLKCON
tst r0,#0x8 ;SLEEP mode?
bne ENTER_SLEEP

ENTER_STOP
ldr r0,=REFRESH
ldr r3,[r0] ;r3=rREFRESH
mov r1, r3
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0] ;Enable SDRAM self-refresh

mov r1,#16 ;wait until self-refresh is issued. may not be needed.
0 subs r1,r1,#1
bne %B0

ldr r0,=CLKCON ;enter STOP mode.
str r2,[r0]

mov r1,#32
0 subs r1,r1,#1 ;1) wait until the STOP mode is in effect.
bne %B0 ;2) Or wait here until the CPU&Peripherals will be turned-off
;   Entering SLEEP mode, only the reset by wake-up is available.

ldr r0,=REFRESH ;exit from SDRAM self refresh mode.
str r3,[r0]

mov pc,lr

ENTER_SLEEP
;NOTE.
;1) rGSTATUS3 should have the return address after wake-up from SLEEP mode.

ldr r0,=REFRESH
ldr r1,[r0] ;r1=rREFRESH
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0] ;Enable SDRAM self-refresh

mov r1,#16 ;Wait until self-refresh is issued,which may not be needed.
0 subs r1,r1,#1
bne %B0

ldr r1,=MISCCR
ldr r0,[r1]
orr r0,r0,#(7<<17)  ;Set SCLK0=0, SCLK1=0, SCKE=0.
str r0,[r1]

ldr r0,=CLKCON ; Enter sleep mode
str r2,[r0]

b . ;CPU will die here.

WAKEUP_SLEEP
;Release SCLKn after wake-up from the SLEEP mode.
ldr r1,=MISCCR
ldr r0,[r1]
bic r0,r0,#(7<<17)  ;SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:0->=SCKE.
str r0,[r1]

;Set memory control registers
ldr r0,=SMRDATA ;be careful!, hzh
ldr r1,=BWSCON ;BWSCON Address
add r2, r0, #52 ;End address of SMRDATA
0
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne %B0

mov r1,#256
0 subs r1,r1,#1 ;1) wait until the SelfRefresh is released.
bne %B0

ldr r1,=GSTATUS3 ;GSTATUS3 has the start address just after SLEEP wake-up
ldr r0,[r1]

mov pc,r0



; 定义清除F、I标志位的函数，用于使能CPU中断响应，只有在特权模式下才起作用
; 对应的C形式：void CLR_IF(void);
;----------------------------------------------------------------------------
   EXPORT  CLR_IF
CLR_IF
   mrs r0,cpsr
   bic r0,r0,#NOINT
   msr cpsr_cxsf,r0
   mov pc,lr

;
; 定义MMU Cache/TLB/etc on/off 函数, 只有在特权模式下才起作用
;----------------------------------------------------------------------------
R1_I EQU (1<<12)
R1_C EQU (1<<2)
R1_A EQU (1<<1)
R1_M    EQU (1)
R1_iA EQU (1<<31)
R1_nF   EQU (1<<30)

;void CP15_EnableICache(void)
   EXPORT CP15_EnableICache
CP15_EnableICache
   mrc p15,0,r0,c1,c0,0
   orr r0,r0,#R1_I
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_DisableICache(void)
   EXPORT CP15_DisableICache
CP15_DisableICache
   mrc p15,0,r0,c1,c0,0
   bic r0,r0,#R1_I
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_EnableDCache(void)
   EXPORT CP15_EnableDCache
CP15_EnableDCache
   mrc p15,0,r0,c1,c0,0
   orr r0,r0,#R1_C
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_DisableDCache(void)
   EXPORT CP15_DisableDCache
CP15_DisableDCache
   mrc p15,0,r0,c1,c0,0
   bic r0,r0,#R1_C
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_EnableAlignFault(void)
   EXPORT CP15_EnableAlignFault
CP15_EnableAlignFault
   mrc p15,0,r0,c1,c0,0
   orr r0,r0,#R1_A
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_DisableAlignFault(void)
   EXPORT CP15_DisableAlignFault
CP15_DisableAlignFault
   mrc p15,0,r0,c1,c0,0
   bic r0,r0,#R1_A
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_EnableMMU(void)
   EXPORT CP15_EnableMMU
CP15_EnableMMU
   mrc p15,0,r0,c1,c0,0
   orr r0,r0,#R1_M
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_DisableMMU(void)
   EXPORT CP15_DisableMMU
CP15_DisableMMU
   mrc p15,0,r0,c1,c0,0
   bic r0,r0,#R1_M
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_SetFastBusMode(void)
; FCLK:HCLK= 1:1
  EXPORT CP15_SetFastBusMode
CP15_SetFastBusMode
   mrc p15,0,r0,c1,c0,0
   bic r0,r0,#R1_iA:OR:R1_nF
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;void CP15_SetAsyncBusMode(void)
; FCLK:HCLK= 1:2
   EXPORT CP15_SetAsyncBusMode
CP15_SetAsyncBusMode
   mrc p15,0,r0,c1,c0,0
   orr r0,r0,#R1_nF:OR:R1_iA
   mcr p15,0,r0,c1,c0,0
   mov pc, lr

;=========================
; Set TTBase
;=========================
;void CP15_SetTTBase(int base)
   EXPORT CP15_SetTTBase
CP15_SetTTBase
   ;ro=TTBase
   mcr p15,0,r0,c2,c0,0
   mov pc, lr

;=========================
; Set Domain
;=========================
;void CP15_SetDomain(int domain)
   EXPORT CP15_SetDomain
CP15_SetDomain
   ;ro=domain
   mcr p15,0,r0,c3,c0,0
   mov pc, lr

;=========================
; ICache/DCache functions
;=========================
;void CP15_InvalidateIDCache(void)
   EXPORT CP15_InvalidateIDCache
CP15_InvalidateIDCache
   mcr p15,0,r0,c7,c7,0
   mov pc, lr

;void CP15_InvalidateICache(void)
   EXPORT CP15_InvalidateICache
CP15_InvalidateICache
   mcr p15,0,r0,c7,c5,0
   mov pc, lr

;void CP15_InvalidateICacheMVA(U32 mva)
   EXPORT CP15_InvalidateICacheMVA
CP15_InvalidateICacheMVA
   ;r0=mva
   mcr p15,0,r0,c7,c5,1
   mov pc, lr

;void CP15_PrefetchICacheMVA(U32 mva)
   EXPORT CP15_PrefetchICacheMVA
CP15_PrefetchICacheMVA
   ;r0=mva
   mcr p15,0,r0,c7,c13,1
   mov pc, lr

;void CP15_InvalidateDCache(void)
   EXPORT CP15_InvalidateDCache
CP15_InvalidateDCache
   mcr p15,0,r0,c7,c6,0
   mov pc, lr

;void CP15_InvalidateDCacheMVA(U32 mva)
   EXPORT CP15_InvalidateDCacheMVA
CP15_InvalidateDCacheMVA
   ;r0=mva
   mcr p15,0,r0,c7,c6,1
   mov pc, lr

;void CP15_CleanDCacheMVA(U32 mva)
   EXPORT CP15_CleanDCacheMVA
CP15_CleanDCacheMVA
   ;r0=mva
   mcr p15,0,r0,c7,c10,1
   mov pc, lr

;void CP15_CleanInvalidateDCacheMVA(U32 mva)
   EXPORT CP15_CleanInvalidateDCacheMVA
CP15_CleanInvalidateDCacheMVA
   ;r0=mva
   mcr p15,0,r0,c7,c14,1
   mov pc, lr

;void CP15_CleanDCacheIndex(U32 index)
   EXPORT CP15_CleanDCacheIndex
CP15_CleanDCacheIndex
   ;r0=index
   mcr p15,0,r0,c7,c10,2
   mov pc, lr

;void CP15_CleanInvalidateDCacheIndex(U32 index)
   EXPORT CP15_CleanInvalidateDCacheIndex
CP15_CleanInvalidateDCacheIndex
   ;r0=index
   mcr p15,0,r0,c7,c14,2
   mov pc, lr

;void CP15_WaitForInterrupt(void)
   EXPORT CP15_WaitForInterrupt
CP15_WaitForInterrupt
   mcr p15,0,r0,c7,c0,4
   mov pc, lr

;===============
; TLB functions
;===============
;voic CP15_InvalidateTLB(void)
   EXPORT CP15_InvalidateTLB
CP15_InvalidateTLB
   mcr p15,0,r0,c8,c7,0
   mov pc, lr

;void CP15_InvalidateITLB(void)
   EXPORT CP15_InvalidateITLB
CP15_InvalidateITLB
   mcr p15,0,r0,c8,c5,0
   mov pc, lr

;void CP15_InvalidateITLBMVA(U32 mva)
   EXPORT CP15_InvalidateITLBMVA
CP15_InvalidateITLBMVA
   ;ro=mva
   mcr p15,0,r0,c8,c5,1
   mov pc, lr

;void CP15_InvalidateDTLB(void)
EXPORT CP15_InvalidateDTLB
CP15_InvalidateDTLB
mcr p15,0,r0,c8,c6,0
mov pc, lr

;void CP15_InvalidateDTLBMVA(U32 mva)
EXPORT CP15_InvalidateDTLBMVA
CP15_InvalidateDTLBMVA
;r0=mva
mcr p15,0,r0,c8,c6,1
mov pc, lr

;=================
; Cache lock down
;=================
;void CP15_SetDCacheLockdownBase(U32 base)
   EXPORT CP15_SetDCacheLockdownBase
CP15_SetDCacheLockdownBase
   ;r0= victim & lockdown base
   mcr p15,0,r0,c9,c0,0
   mov pc, lr

;void CP15_SetICacheLockdownBase(U32 base)
   EXPORT CP15_SetICacheLockdownBase
CP15_SetICacheLockdownBase
   ;r0= victim & lockdown base
   mcr p15,0,r0,c9,c0,1
   mov pc, lr

;=================
; TLB lock down
;=================
;void CP15_SetDTLBLockdown(U32 baseVictim)
   EXPORT CP15_SetDTLBLockdown
CP15_SetDTLBLockdown
   ;r0= baseVictim
   mcr p15,0,r0,c10,c0,0
   mov pc, lr

;void CP15_SetITLBLockdown(U32 baseVictim)
   EXPORT CP15_SetITLBLockdown
CP15_SetITLBLockdown
   ;r0= baseVictim
   mcr p15,0,r0,c10,c0,1
   mov pc, lr

;============
; Process ID
;============
;void CP15_SetProcessId(U32 pid)
   EXPORT CP15_SetProcessId
CP15_SetProcessId
   ;r0= pid
   mcr p15,0,r0,c13,c0,0
   mov pc, lr


; 定义各个bank的存储器控制器参数表，这些参数根据ASM_header.inc中的配置而生成，这里无需修改
; GCS0->SST39VF1601
; GCS1->16c550
; GCS2->IDE
; GCS3->FPGA--FIFO
; GCS4->DM9000
; GCS5->CF Card
; GCS6->SDRAM
; GCS7->unused
;------------------------------------------------------------------------------
SMRDATA DATA
DCD ((B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28));配置各个bank的位宽，这里没有指定是否使用wait和UB/LB握手信号（缺省不使用）
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))   ;GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))   ;GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))   ;GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))   ;GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))   ;GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))   ;GCS5
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))    ;GCS6
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))    ;GCS7
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Tsrc<<18)+REFCNT);REFRESH CONTROL REGISTER
DCD ((BURST_EN<<7)+(SCKE_EN<<5)+(SCLK_EN<<4)+BK76MAP);BANKSIZE REGISTER
DCD (B6_CL<<4);MRSR6
DCD (B7_CL<<4);MRSR7

BaseOfRO DCD |Image$$RO$$Base|
TopOfRO DCD |Image$$RO$$Limit|
BaseOfRW DCD |Image$$RW$$Base|
BaseOfZI DCD |Image$$ZI$$Base|
EndOfZI DCD |Image$$ZI$$Limit|


; 定义中断向量表，此表存在内存中，中断入口根据表格中的地址跳转到正确的地址，这样跳转地址就可以在运行时改变
;---------------------------------------------------------------------------------
ALIGN


AREA RamData, DATA, READWRITE

^   _ISR_STARTADDRESS

HandleReset #   4
HandleUndef #   4
HandleSWI #   4
HandlePabort    #   4
HandleDabort    #   4
HandleReserved  #   4
HandleIRQ #   4
HandleFIQ #   4
;以下是IRQ中断的各个子中断，根据子中断号顺序排列
HandleEINT0 #   4
HandleEINT1 #   4
HandleEINT2 #   4
HandleEINT3 #   4
HandleEINT4_7 #   4
HandleEINT8_23 #   4
HandleCAM #   4 ; Added for 2440.
HandleBATFLT #   4
HandleTICK #   4
HandleWDT #   4
HandleTIMER0 #   4
HandleTIMER1 #   4
HandleTIMER2 #   4
HandleTIMER3 #   4
HandleTIMER4 #   4
HandleUART2  #   4
HandleLCD #   4
HandleDMA0 #   4
HandleDMA1 #   4
HandleDMA2 #   4
HandleDMA3 #   4
HandleMMC #   4
HandleSPI0 #   4
HandleUART1 #   4
HandleNFCON #   4 ; Added for 2440.
HandleUSBD #   4
HandleUSBH #   4
HandleIIC #   4
HandleUART0 #   4
HandleSPI1 #   4
HandleRTC #   4
HandleADC #   4

END
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