每天总结模电-去耦电容(一)

PCB设计过程中给电源管脚(Vcc,Vdd,1.1v,3.3v,1.8v等)加0.1uF的陶瓷电容(104),以PF为基准,1F=10^6uF=10^9nF=10^12pF,所以计算得104

 

为什么要加0.1uF的陶瓷电容?

 

10uF,22uF,2.2uF选型放置电源滤波

Decoupling Cap(去耦电容)和Bypass Cap(旁路电容)

1.板子上有n个不同的负载(比如某个运放电路,MCU内核,ADC,时钟),每个负载都需要稳定地供电---电压稳定,降低纹波,电流充足

2.如果不加去耦电容,会导致出现纹波和各种噪声干扰

3.电源供电取决于变换方式,供电的时候,DC本身有纹波,需要在电源输出Vout端有电容C1,负责将供电电压上的噪声降到尽可能的低

4.电容的本性是储能,用电容来做备用去平衡带来的波动

5.没有去耦电容的波形,加上去耦电容的波形---------------作用去掉了耦合在干净的DC上的噪声【这个噪声可能来自AC】(去耦电容和旁路电容)-----该电容把DC上耦合的噪声给旁路到地上去了,只留下干扰少的DC给后续电路供电

https://mp.weixin.qq.com/s/meWV9lFK5-Gz5Kv74PnC8g---------------链接和工作的总结

转载于:https://www.cnblogs.com/296389183yy/p/10085248.html

Power Distribution Networks with On-Chip Decoupling Capacitors, 2nd edition is dedicated to distributing power in high speed, high complexity integrated circuits with power levels exceeding many tens of watts and power supplies below a volt. This book provides a broad and cohesive treatment of power distribution systems and related design problems, including both circuit network models and design techniques for on-chip decoupling capacitors. The book provides insight and intuition into the behavior and design of on-chip power distribution systems. This book has four primary objectives. The first objective is to describe the impedance characteristics of the overall power distribution system, from the voltage regulator through the printed circuit board and package onto the integrated circuit to the terminals of the on-chip circuitry. The second objective is to discuss the inductive characteristics of on-chip power distribution grids and the related circuit behavior of these structures. The third objective is to present design methodologies for efficiently placing on-chip decoupling capacitors in nanoscale integrated circuits. Finally, the fourth objective is to suggest novel architectures for distributing power across an integrated circuit, as well as provide new methodologies to efficiently analyze and design on-chip power grids. Organized into subareas to provide a more intuitive flow to the reader, this edition adds more than a hundred pages of new content, including inductance models for interdigitated structures, design strategies for multi-layer power grids, advanced methods for efficient power grid design and analysis, and methodologies for simultaneously placing on-chip multiple power supplies and decoupling capacitors. The emphasis of this additional material is on managing the complexity of on-chip power distribution networks.
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