linux: s3c2440 lcd 程序,嵌入式Linux之我行——S3C2440上LCD驱动(FrameBuffer)实例开发讲解...

static int __devinit lcd_fb_probe(struct platform_device *pdev)

{

int i;

int ret;

struct resource *res;

struct fb_info *fbinfo;

struct s3c2410fb_mach_info *mach_info;

struct my2440fb_var *fbvar;

struct s3c2410fb_display *display;

mach_info = pdev->dev.platform_data;

if(mach_info == NULL)

{

dev_err(&pdev->dev, "no platform data for lcd\n");

return -EINVAL;

}

display = mach_info->displays + mach_info->default_display;

fbinfo = framebuffer_alloc(sizeof(struct my2440fb_var), &pdev->dev);

if(!fbinfo)

{

dev_err(&pdev->dev, "framebuffer alloc of registers fai\n");

ret = -ENOMEM;

goto err_noirq;

}

platform_set_drvdata(pdev, fbinfo);

fbvar = fbinfo->par;

fbvar->dev = &pdev->dev;

fbvar->lcd_irq_no = platform_get_irq(pdev, 0);

if(fbvar->lcd_irq_no < 0)

{

dev_err(&pdev->dev, "no lcd irq for platform\n");

return -ENOENT;

}

res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

if(res == NULL)

{

dev_err(&pdev->dev, "failed to get memory region resource\n");

return -ENOENT;

}

fbvar->lcd_mem = request_mem_region(res->start, res->end - res->start + 1,pdev->name);

if(fbvar->lcd_mem == NULL)

{

dev_err(&pdev->dev, "failed to reserve memory region\n");

return -ENOENT;

}

fbvar->lcd_base = ioremap(res->start, res->end - res->start + 1);

if(fbvar->lcd_base == NULL)

{

dev_err(&pdev->dev, "ioremap() of registers failed\n");

ret = -EINVAL;

goto err_nomem;

}

fbvar->lcd_clock = clk_get(NULL, "lcd");

if(!fbvar->lcd_clock)

{

dev_err(&pdev->dev, "failed to find lcd clock source\n");

ret = -ENOENT;

goto err_nomap;

}

clk_enable(fbvar->lcd_clock);

ret = request_irq(fbvar->lcd_irq_no, lcd_fb_irq, IRQF_DISAB, pdev->name, fbvar);

if(ret)

{

dev_err(&pdev->dev, "IRQ%d error %d\n", fbvar->lcd_irq_no, ret);

ret = -EBUSY;

goto err_noclk;

}

strcpy(fbinfo->fix.id, driver_name);

fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;

fbinfo->fix.type_aux = 0;

fbinfo->fix.xpanstep = 0;

fbinfo->fix.ypanstep = 0;

fbinfo->fix.ywrapstep= 0;

fbinfo->fix.accel = FB_ACCEL_NONE;

fbinfo->var.nonstd = 0;

fbinfo->var.activate = FB_ACTIVATE_NOW;

fbinfo->var.accel_flags = 0;

fbinfo->var.vmode = FB_VMODE_NONINTERLACED;

fbinfo->var.xres = display->xres;

fbinfo->var.yres = display->yres;

fbinfo->var.bits_per_pixel = display->bpp;

fbinfo->fbops = &my2440fb_ops;

fbinfo->flags = FBINFO_FLAG_DEFAULT;

fbinfo->pseudo_palette = &fbvar->pseudo_pal;

for(i = 0; i < 256; i++)

{

fbvar->palette_buffer[i] = PALETTE_BUFF_CLEAR;

}

for (i = 0; i < mach_info->num_displays; i++)

{

unsigned long smem_len = (mach_info->displays[i].xres *mach_info->displays[i].yres * mach_info->displays[i].bpp) >> 3;

if(fbinfo->fix.smem_len < smem_len)

{

fbinfo->fix.smem_len = smem_len;

}

}

msleep(1);

my2440fb_init_registers(fbinfo);

my2440fb_check_var(fbinfo);

ret = my2440fb_map_video_memory(fbinfo);

if (ret)

{

dev_err(&pdev->dev, "failed to allocate video RAM: %d\n", ret);

ret = -ENOMEM;

goto err_nofb;

}

ret = register_framebuffer(fbinfo);

if (ret < 0)

{

dev_err(&pdev->dev, "failed to register framebuffer device: %d\n", ret);

goto err_video_nomem;

}

ret = device_create_file(&pdev->dev, &dev_attr_debug);

if (ret)

{

dev_err(&pdev->dev, "failed to add debug attribute\n");

}

return 0;

err_nomem:

release_resource(fbvar->lcd_mem);

kfree(fbvar->lcd_mem);

err_nomap:

iounmap(fbvar->lcd_base);

err_noclk:

clk_disable(fbvar->lcd_clock);

clk_put(fbvar->lcd_clock);

err_noirq:

free_irq(fbvar->lcd_irq_no, fbvar);

err_nofb:

platform_set_drvdata(pdev, NULL);

framebuffer_release(fbinfo);

err_video_nomem:

my2440fb_unmap_video_memory(fbinfo);

return ret;

}

static irqreturn_t lcd_fb_irq(int irq, void *dev_id)

{

struct my2440fb_var *fbvar = dev_id;

void __iomem *lcd_irq_base;

unsigned long lcdirq;

lcd_irq_base = fbvar->lcd_base + S3C2410_LCDINTBASE;

lcdirq = readl(lcd_irq_base + S3C24XX_LCDINTPND);

if(lcdirq & S3C2410_LCDINT_FRSYNC)

{

if (fbvar->palette_ready)

{

my2440fb_write_palette(fbvar);

}

writel(S3C2410_LCDINT_FRSYNC, lcd_irq_base + S3C24XX_LCDINTPND);

writel(S3C2410_LCDINT_FRSYNC, lcd_irq_base + S3C24XX_LCDSRCPND);

}

return IRQ_HANDLED;

}

static void my2440fb_write_palette(struct my2440fb_var *fbvar)

{

unsigned int i;

void __iomem *regs = fbvar->lcd_base;

fbvar->palette_ready = 0;

for (i = 0; i < 256; i++)

{

unsigned long ent = fbvar->palette_buffer[i];

if (ent == PALETTE_BUFF_CLEAR)

{

continue;

}

writel(ent, regs + S3C2410_TFTPAL(i));

if (readw(regs + S3C2410_TFTPAL(i)) == ent)

{

fbvar->palette_buffer[i] = PALETTE_BUFF_CLEAR;

}

else

{

fbvar->palette_ready = 1;

}

}

}

static int my2440fb_init_registers(struct fb_info *fbinfo)

{

unsigned long flags;

void __iomem *tpal;

void __iomem *lpcsel;

struct my2440fb_var *fbvar = fbinfo->par;

struct s3c2410fb_mach_info *mach_info = fbvar->dev->platform_data;

tpal = fbvar->lcd_base + S3C2410_TPAL;

lpcsel = fbvar->lcd_base + S3C2410_LPCSEL;

local_irq_save(flags);

modify_gpio(S3C2410_GPCUP, mach_info->gpcup, mach_info->gpcup_mask);

modify_gpio(S3C2410_GPCCON, mach_info->gpccon, mach_info->gpccon_mask);

modify_gpio(S3C2410_GPDUP, mach_info->gpdup, mach_info->gpdup_mask);

modify_gpio(S3C2410_GPDCON, mach_info->gpdcon, mach_info->gpdcon_mask);

local_irq_restore(flags);

writel(0x00, tpal);

writel(mach_info->lpcsel, lpcsel);

return 0;

}

static inline void modify_gpio(void __iomem *reg, unsigned long set, unsigned long mask)

{

unsigned long tmp;

tmp = readl(reg) & ~mask;

writel(tmp | set, reg);

}

static int my2440fb_check_var(struct fb_info *fbinfo)

{

unsigned i;

struct fb_var_screeninfo *var = &fbinfo->var;

struct my2440fb_var *fbvar = fbinfo->par;

struct s3c2410fb_mach_info *mach_info = fbvar->dev->platform_data;

struct s3c2410fb_display *display = NULL;

struct s3c2410fb_display *default_display = mach_info->displays +mach_info->default_display;

int type = default_display->type;

if (var->yres == default_display->yres &&

var->xres == default_display->xres &&

var->bits_per_pixel == default_display->bpp)

{

display = default_display;

}

else

{

for (i = 0; i < mach_info->num_displays; i++)

{

if (type == mach_info->displays[i].type &&

var->yres == mach_info->displays[i].yres &&

var->xres == mach_info->displays[i].xres &&

var->bits_per_pixel == mach_info->displays[i].bpp)

{

display = mach_info->displays + i;

break;

}

}

}

if (!display)

{

return -EINVAL;

}

fbvar->regs.lcdcon1 = display->type;

fbvar->regs.lcdcon5 = display->lcdcon5;

var->xres_virtual = display->xres;

var->yres_virtual = display->yres;

var->height = display->height;

var->width = display->width;

var->pixclock = display->pixclock;

var->left_margin = display->left_margin;

var->right_margin = display->right_margin;

var->upper_margin = display->upper_margin;

var->lower_margin = display->lower_margin;

var->vsync_len = display->vsync_len;

var->hsync_len = display->hsync_len;

var->transp.offset = 0;

var->transp.length = 0;

switch (var->bits_per_pixel)

{

case 1:

case 2:

case 4:

var->red.offset = 0;

var->red.length = var->bits_per_pixel;

var->green = var->red;

var->blue = var->red;

break;

case 8:

if (display->type != S3C2410_LCDCON1_TFT)

{

var->red.length = 3;

var->red.offset = 5;

var->green.length = 3;

var->green.offset = 2;

var->blue.length = 2;

var->blue.offset = 0;

}else{

var->red.offset = 0;

var->red.length = 8;

var->green = var->red;

var->blue = var->red;

}

break;

case 12:

var->red.length = 4;

var->red.offset = 8;

var->green.length = 4;

var->green.offset = 4;

var->blue.length = 4;

var->blue.offset = 0;

break;

case 16:

if (display->lcdcon5 & S3C2410_LCDCON5_FRM565)

{

var->red.offset = 11;

var->green.offset = 5;

var->blue.offset = 0;

var->red.length = 5;

var->green.length = 6;

var->blue.length = 5;

} else {

var->red.offset = 11;

var->green.offset = 6;

var->blue.offset = 1;

var->red.length = 5;

var->green.length = 5;

var->blue.length = 5;

}

break;

case 32:

var->red.length = 8;

var->red.offset = 16;

var->green.length = 8;

var->green.offset = 8;

var->blue.length = 8;

var->blue.offset = 0;

break;

}

return 0;

}

static int __init my2440fb_map_video_memory(struct fb_info *fbinfo)

{

dma_addr_t map_dma;

struct my2440fb_var *fbvar = fbinfo->par;

unsigned map_size = PAGE_ALIGN(fbinfo->fix.smem_len);

fbinfo->screen_base = dma_alloc_writecombine(fbvar->dev, map_size, &map_dma,GFP_KERNEL);

if (fbinfo->screen_base)

{

memset(fbinfo->screen_base, 0x00, map_size);

fbinfo->fix.smem_start = map_dma;

}

return fbinfo->screen_base ? 0 : -ENOMEM;

}

static inline void my2440fb_unmap_video_memory(struct fb_info *fbinfo)

{

struct my2440fb_var *fbvar = fbinfo->par;

unsigned map_size = PAGE_ALIGN(fbinfo->fix.smem_len);

dma_free_writecombine(fbvar->dev, map_size, fbinfo->screen_base,fbinfo->fix.smem_start);

}

static int __devexit lcd_fb_remove(struct platform_device *pdev)

{

struct fb_info *fbinfo = platform_get_drvdata(pdev);

struct my2440fb_var *fbvar = fbinfo->par;

unregister_framebuffer(fbinfo);

my2440fb_lcd_enable(fbvar, 0);

msleep(1);

my2440fb_unmap_video_memory(fbinfo);

platform_set_drvdata(pdev, NULL);

framebuffer_release(fbinfo);

free_irq(fbvar->lcd_irq_no, fbvar);

if (fbvar->lcd_clock)

{

clk_disable(fbvar->lcd_clock);

clk_put(fbvar->lcd_clock);

fbvar->lcd_clock = NULL;

}

iounmap(fbvar->lcd_base);

release_resource(fbvar->lcd_mem);

kfree(fbvar->lcd_mem);

return 0;

}

static void my2440fb_lcd_enable(struct my2440fb_var *fbvar, int enable)

{

unsigned long flags;

local_irq_save(flags);

if (enable)

{

fbvar->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID;

}

else

{

fbvar->regs.lcdcon1 &= ~S3C2410_LCDCON1_ENVID;

}

writel(fbvar->regs.lcdcon1, fbvar->lcd_base + S3C2410_LCDCON1);

local_irq_restore(flags);

}

#ifdef CONFIG_PM

static int lcd_fb_suspend(struct platform_device *pdev, pm_message_t state)

{

&nbs