linux系统查看cpu微架构,Intel CPU 历代微架构名称

1 本文由来

前段时间网上买了金士顿的系统指定内存(DDR3 1600 低电压版本1.35V), 8G x 2 = 16GB。顺利安装到了Mac Mini上，运行稳定快速。今天觉得这么大内存用在家用的Mac Mini上实在是浪费，于是把它们转移到了ThinkPad T410S笔记本上。于是各种问题来了，首先是使用超过600MB内存时，Linux系统自动重启；然后是好好的Windows7系统无法启动。于是各种排查，最终换回原来的内存条解决问题。

之后，仔细查看了京东上的产品说明，“适用于Sandy Bridge及以上平台”。马上用CPU-z测试，发现ThinkPad T410S的CPU代码名为Arrandale，属于Westmere平台，是比Sandy Bridge更早出现的一个平台。所以，兼容性肯定存在问题。

又查了一下T410s在2010年上市，早于Sandy Bridge的上市时间2011年，显然T410S是不可能采用Sandy Bridge架构的。另外，从Sandy Bridge开始，Intel i系列CPU的型号采用四位数字，如 i5 M2600，而之前采用的是三位数字，如i5 M570。

还是老老实实地把8GX2超大内存条返回到了Mac Mini上，T410S只能看着眼馋了…

由此看来，同样是DDR3的内存条，也不一定全都通用，还要注意其适用的CPU平台。

2 Intel桌面CPU家族名称大集合

8086: first x86 processor; initially a temporary substitute for the iAPX 432 to compete with Motorola, Zilog, and National Semiconductor and to top the successful Z80.

186: included a DMA controller, interrupt controller, timers, and chip select logic.

286: first x86 processor with protected mode

i386: first 32-bit x86 processor

i486: Intel’s second generation of 32-bit x86 processors, introduced built-in floating point unit (FPU), 8 KB on-chip L1 cache, and pipelining.

P5: original Pentium microprocessors

P6: used in Pentium Pro, Pentium II, Pentium II Xeon, Pentium III, and Pentium III Xeon microprocessors.

Pentium M: updated version of Pentium III’s P6 microarchitecture designed from the ground up for mobile computing.

Enhanced Pentium M: updated, dual core version of the Pentium M microarchitecture used in Core microprocessors.

NetBurst: used in Pentium 4, Pentium D, and some Xeon microprocessors. Commonly referred to as P7 although its internal name was P68 (P7 was used for Itanium). Later revisions were the first to feature Intel’s x86-64 architecture.

Core: reengineered P6-based microarchitecture used in Core 2 and Xeon microprocessors, built on a 65 nm process.

Penryn: 45 nm shrink of the Core microarchitecture with larger cache, higher FSB and clock speeds, and SSE4.1 instructions.

Nehalem: released November 17, 2008, built on a 45 nm process and used in the Core i7, Core i5, Core i3 microprocessors. Incorporates the memory controller into the CPU die.

Westmere: 32 nm shrink of the Nehalem microarchitecture with several new features.

Sandy Bridge: released January 9, 2011, built on a 32 nm process and used in the Core i7, Core i5, Core i3 second generation microprocessors, and in Pentium B9XX and Celeron B8XX series. Formerly called Gesher but renamed in 2007.[1]

Ivy Bridge: 22 nm shrink of the Sandy Bridge microarchitecture released April 28, 2012.

Haswell: new 22 nm microarchitecture, released June 3, 2013.

Broadwell: 14 nm shrink of the Haswell microarchitecture, released in 2014. Formerly called Rockwell.

Skylake: future Intel microarchitecture, based on a 14 nm process.

Cannonlake: 10 nm shrink of the Skylake microarchitecture. Formerly called Skymont.

Larrabee: multi-core in-order x86-64 updated version of P5 microarchitecture, with wide SIMD vector units and texture sampling hardware for use in graphics. Cores derived from this microarchitecture are called MIC (Many Integrated Core).

Bonnell: 45 nm, low-power, in-order microarchitecture for use in Atom processors.

Saltwell: 32 nm shrink of the Bonnell microarchitecture.

Silvermont: 22 nm, out-of-order microarchitecture for use in Atom processors.

Airmont: 14 nm shrink of the Silvermont microarchitecture.

Goldmont: 14 nm Atom microarchitecture.