uboot中fb实现

帧缓冲区fb在内存中,要实现fb同步显示需要设定DMA操作。

设定LCD的DMA操作,要在开始操作LCD之前。

common/lcd.c中定义lcd_init() -->

driver/video/atmel_lcdfb.c定义lcd_ctrl_init().

lcd_ctrl_init()定义了DMA与mm的联系。

 67 void lcd_ctrl_init(void *lcdbase)
 68 {
 69     unsigned long value;
 70
 71     /* Turn off the LCD controller and the DMA controller */
 72     lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
 73             1 << ATMEL_LCDC_GUARDT_OFFSET);
 74
 75     /* Wait for the LCDC core to become idle */
 76     while (lcdc_readl(panel_info.mmio, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
 77         udelay(10);
 78
 79     lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, 0);
 80
 81     /* Reset LCDC DMA */
 82     lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMARST);
 83
 84     /* ...set frame size and burst length = 8 words (?) */
 85     value = (panel_info.vl_col * panel_info.vl_row *
 86          NBITS(panel_info.vl_bpix)) / 32;
 87     value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
 88     lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMAFRMCFG, value);
 89
 90     /* Set pixel clock */
 91     value = get_lcdc_clk_rate(0) / panel_info.vl_clk;
 92     if (get_lcdc_clk_rate(0) % panel_info.vl_clk)
 93         value++;
 94     value = (value / 2) - 1;
 95
 96     if (!value) {
 97         lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
 98     } else
 99         lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1,
100                 value << ATMEL_LCDC_CLKVAL_OFFSET);
101
102     /* Initialize control register 2 */
103 #ifdef CONFIG_AVR32
104     value = ATMEL_LCDC_MEMOR_BIG | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
105 #else
106     value = ATMEL_LCDC_MEMOR_LITTLE | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
107 #endif
108     if (panel_info.vl_tft)
109         value |= ATMEL_LCDC_DISTYPE_TFT;
110
111     if (!(panel_info.vl_sync & ATMEL_LCDC_INVLINE_INVERTED))
112         value |= ATMEL_LCDC_INVLINE_INVERTED;
113     if (!(panel_info.vl_sync & ATMEL_LCDC_INVFRAME_INVERTED))
114         value |= ATMEL_LCDC_INVFRAME_INVERTED;
115     value |= (panel_info.vl_bpix << 5);
116     lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON2, value);
117
118     /* Vertical timing */
119     value = (panel_info.vl_vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
120     value |= panel_info.vl_upper_margin << ATMEL_LCDC_VBP_OFFSET;
121     value |= panel_info.vl_lower_margin;
122     lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM1, value);
123
124     /* Horizontal timing */
125     value = (panel_info.vl_right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
126     value |= (panel_info.vl_hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
127     value |= (panel_info.vl_left_margin - 1);
128     lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM2, value);
129
130     /* Display size */
131     value = (panel_info.vl_col - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
132     value |= panel_info.vl_row - 1;
133     lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDFRMCFG, value);
134
135     /* FIFO Threshold: Use formula from data sheet */
136     value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
137     lcdc_writel(panel_info.mmio, ATMEL_LCDC_FIFO, value);
138
139     /* Toggle LCD_MODE every frame */
140     lcdc_writel(panel_info.mmio, ATMEL_LCDC_MVAL, 0);
141
142     /* Disable all interrupts */
143     lcdc_writel(panel_info.mmio, ATMEL_LCDC_IDR, ~0UL);
144
145     /* Set contrast */
146     value = ATMEL_LCDC_PS_DIV8 |
147         ATMEL_LCDC_POL_POSITIVE |
148         ATMEL_LCDC_ENA_PWMENABLE;
149     lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_CTR, value);
150     lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
151
152     /* Set framebuffer DMA base address and pixel offset */
153     lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMABADDR1, (u_long)lcdbase);
154
155     lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMAEN);
156     lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
157             (1 << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
158 }



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