Cypress PSoC6 BLE Middleware Library(2.20)笔记

The BLE stack implements the core BLE functionality as defined in Bluetooth Core Specification 5.0. The stack is included as a precompiled library and is included in the BLE Middleware library.
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The Link Layer is a hardware-firmware co-implementation, where the key time critical LL functions are implemented in the LL hardware. The LL firmware maintains and controls the key LL procedure state machines. It supports all the BLE chip specific low-power modes**. The BLE Stack is a pre-compiled library** in the BLE_PDL Component.
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Device Bonding

The BLE Middleware will store the link key of a connection after pairing with the remote device. If a connection is lost and re-established, the devices will use the previously stored key for the connection. The BLE stack will update the bonding data in RAM while the devices are connected. If the bonding data is to be retained during shutdown, the application can use Cy_BLE_StoreBondingData() API to write the bonding data from RAM to the dedicated Flash location, as defined by the BLE Middleware.

Multi-Connection Support

The BLE Middleware supports up to four simultaneous Multi-Master Multi-Slave (MMMS) BLE connections in any combination of roles. For example, it can be a master of four slave devices (4M), a master of three slave devices and a slave of another device (3M1S), or a slave of four devices (4S), or any other combination.
This single GATT database is reused across all BLE connections.

The common MMMS usage are Multi-Master Single-Slave and Multi-Role when the BLE_PDL Component is configured in all the GAP roles (Central, Peripheral, Observer, and Broadcaster).

Multi-Master Single-Slave Usage Block Diagram

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Multi-Role Usage Block Diagram

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目录1 简介 ............................................................................21.1 先决条件..............................................................32 带 BLE 连接 资源的 PSoC 6 MCU ...............................42.1 PSoC Creator......................................................42.2 PSoC Creator 帮助 .............................................52.3 代码示例..............................................................63 PSoC 6 MCU BLE 连接器件特性.................................74 具备 BLE 连接开发生态系统的 PSoC 6 MCU ..............94.1 配置 BLE 连接先锋套件的 PSoC 63....................94.2 固件/应用开发 .....................................................94.3 外设驱动库..........................................................94.4 PSoC Creator....................................................104.5 支持其它 IDE.....................................................104.6 RTOS 支持........................................................144.7 调试...................................................................144.8 CySmart 主机仿真工具和移动应用程序.............145 PSoC 6 MCU BLE 连接性开发设置 ...........................156 我的第一款采用 BLE 的 PSoC 6 MCU 设计 ...............176.1 使用以下指令 ....................................................176.2 准备工作............................................................176.3 关于设计............................................................186.4 Part 1:从零开始创建新项目...............................196.5 Part 2: 进行设计................................................236.6 Part 3:生成源代码 .............................................406.7 Part 4:编写固件.................................................436.8 Part 5: 编译项目并对设备编程 ..........................526.9 Part 6: 测试您的设计.........................................547 总结 ..........................................................................608 相关应用笔记和代码示例...........................................60Appendix A. 赛普拉斯专业术语 .................................62Appendix B. BLE 协议...............................................63B.1 概述...................................................................63B.2 物理层 (PHY) ....................................................63B.3 链路层 (LL)........................................................64B.4 主机控制接口 (HCI)...........................................64B.5 逻辑链路控制及适配协议 (L2CAP)....................65B.6 安全管理器(SM)................................................65B.7 属性协议(ATT) ..................................................65B.8 通用属性配置文件(GATT) .................................68B.9 通用访问配置文件 (GAP) ..................................69Appendix C. PSoC 6 MCU BLE 器件特性 .................72C.1 系统资源 ...........................................................72C.2 安全引导 ...........................................................74C.3 可编程数字外设.................................................74C.4 可编程模拟外设.................................................77C.5 可编程 GPIO.....................................................78Appendix D. 赛普拉斯物联网开发工具 ......................79D.1 带 BLE Pioneer 先锋套件的 PSoC 63 ...............
目录1 简介 ............................................................................22 封装选择......................................................................23 电源 ............................................................................43.1 电源引脚连接 ......................................................43.2 PMIC 控制器 .......................................................53.3 功率上升和排序注意事项.....................................63.4 设备电源的 PSoC Creator 设置...........................63.5 散热考虑因素 ......................................................63.6 eFuse 编程..........................................................74 时钟 ............................................................................74.1 PSoC Creator 时钟选项卡...................................74.2 晶体振荡器..........................................................84.3 外部时钟............................................................105 复位 ..........................................................................116 编程和调试.................................................................126.1 SWD .................................................................126.2 JTAG.................................................................136.3 ETM ..................................................................136.4 PSoC Creator 中的调试选择 .............................147 GPIO 引脚 .................................................................157.1 I/O 引脚选择......................................................158 组件放置....................................................................169 模拟模块设计技巧......................................................169.1 CapSense.........................................................169.2 SAR ADC..........................................................199.3 CTDAC .............................................................2010 在设计中使用外部存储器...........................................2111 USB 连接...................................................................2211.1 PSoC 6 MCU USB 引脚说明.............................2211.2 PSOC 6 MCU 作为 USB 器件...........................2212 天线设计....................................................................2212.1 支持外部功率放大器/低噪声放大器/ RF 前端 ....2413 音频子系统 ................................................................2513.1 PDM-PCM 转换器的时钟生成 ...........................2613.2 I2S 音频设备的时钟生成 ...................................2614 总结 ..........................................................................2815 相关文档....................................................................28Appendix A. PCB 布局提示 .......................................30Appendix B. 原理图检查表 ........................................31Appendix C. 赛普拉斯术语 ........................................32文档修订记录...................................................................33销售、解决方案以及法律信息..........................................
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