DSP的SCI及printf问题记录

实验结果

Scia模块的简单配置

#include "sci.h"
void Sci_GPIO_Init(void)
{
   
    EALLOW;
    GpioCtrlRegs.GPBPUD.bit.GPIO36 = 0;    // Enable pull-up for GPIO36 (SCIRXDA)
    GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0;    // Enable pull-up for GPIO35 (SCITXDA)
    /* Set qualification for selected pins to asynch only */
    // Inputs are synchronized to SYSCLKOUT by default.
    // This will select asynch (no qualification) for the selected pins.
    GpioCtrlRegs.GPBQSEL1.bit.GPIO36 = 3;  // Asynch input GPIO28 (SCIRXDA)
    /* Configure SCI-A pins using GPIO regs*/
    // This specifies which of the possible GPIO pins will be SCI functional pins.
    GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 1;   // Configure GPIO36 for SCIRXDA operation
    GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 1;   // Configure GPIO35 for SCITXDA operation
    EDIS;
}
void Sci_Init(volatile struct SCI_REGS  *pSciRegs,Uint32 BaudRate)
{
   
    Uint16 baud_temp;
    baud_temp=(Uint16)(4687500/BaudRate-1);
	// SYSCLOCKOUT = 150MHz; LSPCLK = 1/(2*2)= 37.5 MHz
    // baud_temp = (LSPCLK / (BaudRate x 8)) -1
    //pSciRegs->SCICCR.all =0x0007;    //数据格式：8位数据位，1个起始位，1个停止位，无奇偶校验位。
    pSciRegs->SCICCR.bit.SCICHAR        =7; // 2:0  Character length control
    pSciRegs->SCICCR.bit.ADDRIDLE_MODE  =0; // 3    ADDR/IDLE Mode control  :0-idle line protocol 1-address bit protocol
    pSciRegs->