【电子技术】【2018.01】模型预测控制FPGA实现的协同设计

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本文为英国伦敦帝国理工学院（作者：Bulat Khusainov）的博士论文，共142页。

模型预测控制（MPC）是一种先进的控制方法，具有明确的性能优化、系统的约束处理和自然处理非线性的能力。在每个采样时刻求解一个优化问题的必要性使得MPC成为一种需要计算的技术，尤其是在应用于快速动态系统时。本文致力于开发线性和非线性模型预测控制器的有效硬件实现。

在本论文的第一部分中，我们提出了一个快速原型化嵌入式优化算法的工具链。工具链由两个软件工具组成：SPLIT和Protoip。SPLIT能够生成面向CPU和FPGA的C代码，用于使用运算符拆分方法进行嵌入式优化。生成的代码可以使用新版本的Protoip在嵌入式平台上自动部署和测试，Protoip是一种软件工具，用于在CPU、FPGA、集成通用处理器和可重构逻辑的异构平台上快速原型化优化算法。

第二部分提出了一个在异构计算平台上实现非线性模型预测控制的框架。在通用CPU和FPGA之间划分计算工作负载可以充分利用每个计算子系统的优势，并在控制性能与可重构逻辑使用之间进行权衡。在所提议的设计实现中，调度稀疏矩阵向量乘法的新方法能够在内存和计算资源使用方面得到显著改进。

本文第三部分介绍了系统优化在MPC软硬件协同设计中的应用。描述了将MPC设计问题转化为多目标优化问题的过程。最后，给出了预测控制器的两个测试用例，包括基于CPU和FPGA的实现。

Model PredictiveControl (MPC) is an advanced control method that is capable of explicit performanceoptimization, systematic constraint handling and dealing with nonlinearities ina natural way. The necessity of solving an optimization problem at eachsampling instant makes MPC a computationally demanding technique, especiallywhen applied to fast dynamical systems. This thesis is concerned withdeveloping efficient hardware implementations of linear and nonlinear modelpredictive controllers.

In the first partof this thesis, a software toolchain for quick prototyping of embedded optimizationalgorithms on Field-Programmable Gate Arrays (FPGAs) is presented. Thetoolchain consists of two software tools: SPLIT and Protoip. SPLIT is capableof generating CPU and FPGA-oriented C code for embedded optimization usingoperator splitting methods. The generated code can be automatically deployedand tested on an embedded platform using a new release of Protoip, a softwaretool for quick prototyping of optimization algorithm on CPUs, FPGAs andheterogeneous platforms that incorporate both general-purpose processors andreconfigurable logic.

The second partpresents a framework for implementation of nonlinear model predictive controlon a heterogeneous computing platform. Splitting the computational workloadbetween a general-purpose CPU and an FPGA allows exploiting the strengths ofeach computational subsystem and trading off control performance againstreconfigurable logic usage. A new method for scheduling sparse matrix-vectormultiplication within the proposed implementation enables significant improvementsin terms of memory and computational resources usage.

The third part ofthis thesis presents an application of systematic optimization to the co-designof MPC software and computational hardware. A procedure for formulating the MPCdesign problem as a multi-objective optimization problem is described. Finally,two test cases including CPU and FPGA-based implementations of predictivecontrollers are considered.