xDSA Instruction Set
xDSA Instruction
Set is an Instruction Set Architecture (ISA) that covers applications from multiple domains. It starts from unifying instructions definition of Neural-network Processing Unit (NPU) for Artificial Intelligence domain. Then it extends to other existing computational domains like CPU for general computability, GPU for presenting computability, ISP for imaging computability, and so on. This extending compute domain is defined as Unity domain. On the other hand, xDSA is not just a revolutionary innovation of compute architecture, but also one that has certain compatibility with popular compute architectures (domain).
1. Instruction Format
xDSA Instruction Set is fixed length encoding, in formats of execution and storage. The execution format defines the logic structure of the instruction when it is executed. The storage format specifies how the instructions are packed when they are stored in memory systems.
Execution Format
Logically, an xDSA instruction is a 136-bit long-word, Little-endian encoded. There are two parts in the instruction, namely Domain ID (DID) and Payload.
Bit 135:8 | Bit 7:0 |
---|---|
Payload | DID |
The instruction Domain ID is used to indicate the compute domain to which the corresponding 128-bit Payload belongs. DID is encoded into three categories: STANDARD, CUSTOM and RESERVED.
STANDARD: Standard encodings are defined by the ISA governance body.
ISA | Coding |
---|---|
Unity | 8’b0000_0000 |
ZHOUYI | 8’b0000_0001 |
ARM32 | 8’b0000_0010 |
ARM64 | 8’b0000_0011 |
RISCV32 | 8’b0000_0100 |
RISCV64 | 8’b0000_0101 |
MIPS32 | 8‘b0000_0110 |
END | 8’b0111_1111 |
END instruction means the current instruction is the last instruction of the program and the content (128 bits) is ignored. The last instruction of the main program should set the DID to be END.
CUSTOM: Custom encodings 8’b1xxx_xxxx are made available for vendor-specific use and shall never be used for Standard category.
RESERVED: Other DIDs than the Standard and Custom are Reserved encodings 8’b0xxx_xxxx which are saved for future Standard or Custom category extensions.
The instruction Payload encodes the actual information needed to perform a certain operating function.
Storage Format
xDSA instructions are physically stored in two parts, DIDs pack and Payloads pack. In the memory, every 32 instructions are grouped together. The first 256 bits are the DID fields of the (32 instructions) group, followed by the 32 Payloads (32 x 128 bits). The figure below shows the group of instructions stored in memory.
Bit 255:248 | Bit 247:240 | … | Bit 15:8 | Bit 7:0 |
---|---|---|---|---|
DID 31 | DID 30 | … | DID 1 | DID 0 |
Bit 255:128 | Bit 127:0 |
---|---|
Instruction 1 | Instruction 0 |
Instruction 3 | Instruction 2 |
… | … |
Instruction 29 | Instruction 28 |
Instruction 31 | Instruction 30 |
Using the xDSA Instruction Set, different domain instructions can be mixed in one continuous physical program memory. However, each domain (classified by DID) has its own logical memory which works in their own Control context (by instructions like Jump, Branch). image
2. Unity Domain Instructions (DID = 0)
Unity domain instruction (Unity ISA) is 128-bit fixed length encoded, with DID set to 8-bit 0 as shown in the figure below.
Bit 135:8 | Bit 7:0 |
---|---|
Unity Instructions | 8‘b0 |
Unity Domain targets large data computation. It is not similar with the RISC (Load-Store) architecture whose data memory can only be accessed by load/store instruction. In the Unity Domain, all the data computing instruction can access memory directly, and the data length is not fixed which ranges from 1B to 4GB when in 32bit address space. Unity Domain instructions include (not limited to) multiple computational function sections including AI (Neural Networks), Image Processing, Multimedia Encode/Decode etc. For each specific section, it has a specific OP_SECTION field and own OP_CODE coding.
Bit 135:72 | Bit 71:40 | Bit 39:30 | Bit 29:16 | Bit 15:14 | Bit 13:8 |
---|---|---|---|---|---|
OPERAND DESCRIPTOR | SYNC_CTRL | RSVD | OP_CODE | ADDR SPACE | OP_SECTION |
OP_SECTION defines the category of the Operation domain.
- OP_SECTION[5:0] == 6’h3F is assigned to BASE specific instruction encoding.
- OP_SECTION[5:0] == 6’h00 is assigned to AI specific instruction encoding.
- Other definition is reserved for now.
ADDR SPACE (AS) indicates the width of the address spaces.
- 2’b00 -> 16bit address space
- 2’b01 -> 32bit address space
- 2’b10 -> 64bit address space
- 2’b11 -> Reserved
SYNC_CTRL is used to control the synchronization process of xDSA instruction synchronization. Before the instruction to be executed, the function should check whether need to fetch the key and how many keys from the specified key table. After the instruction finishes executing, the function should check whether need to deposit a key to the specified key table. The key tables are memory mapped tables. There are up to 4 Key Tables (each 256 entries) in the system used for the synchronization between the instructions.
- NUM_KEY: indicate to the number of key to fetch
-
- 000 -> 1 key
-
- 001 -> 2 keys
-
- ……
-
- 111 -> 8 keys
- BLK: indicate to block the following instruction fetch
- Sync_en: Bit[0]: key fetch enable Bit[1]: key deposit enable
- Keyr_Bar: totally up to 4 key tables used to select the one of the tables (BAR) to fetch key
- Keyw_Bar: used to select the one of the tables (BAR) to deposit key
- Fetch_key_addr: The address(index) to fetch the key. In each table, there are totally 256 entries.
- Deposit_key_addr: The address(index) to deposit the key.
OPERAND DESCRIPTOR is an address pointer that points to the operand table in the memory which contains all the operands information of the instruction.
BASE Instructions
The Base section includes the basic operation for the unity core.
EXIT instruction
Direct unity core to exit and stop instruction fetch.
OP_CODE[13:5] = 9’b111111111
EXIT: (OP_CODE[4:0] = ‘h1f)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: RESERVED
- OP_CODE: EXIT (14’b111111111_11111)
- OTHERS: RESERVED
Arithmetic instructions
The instructions in this section include the elementwise arithmetic instructions without quantization output.
OP_CODE[13:5] = 9’b0
ADD: (OP_CODE[4:0] = ‘h0) Elementwise ADD for sign/unsign (u/s).
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- result unit/source 0 unit/ source 1 unit are independent.
- result can be set saturation or not.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ADD (14’b 000000000_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4* AddrSpace +31: 4AddrSpace]
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
- Note: Transfer length is the number of element.
SUB: (OP_CODE[4:0] = ‘h1) Elementwise SUB for sign/unsign (u/s).
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- result unit/source 0 unit/ source 1 unit are independent.
- result can be set saturation or not.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SUB (14’b 000000000_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
MAX: (OP_CODE[4:0] = ‘h2) Select the maximum value between two operands
- Elementwise MAX for sign/unsign (u/s).
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- result unit/source 0 unit/ source 1 unit are independent.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MAX (14’b 000000000_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
MIN: (OP_CODE[4:0] = ‘h3) Select the minimum value between two operands
- Elementwise MIN for sign/unsign (u/s).
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- result unit/source 0 unit/ source 1 unit are independent.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MIN (14’b 000000000_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
MAXSI: (OP_CODE[4:0] = ‘h4) Select the maximum value corresponding index between two operands
- Elementwise MAXSI for sign/unsign (u/s).
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- result unit/source 0 unit/ source 1 unit are independent.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MAXSI (14’b 000000000_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
MINSI: (OP_CODE[4:0] = ‘h5) Select the minimum value corresponding index between two operands
- Elementwise MINSI for sign/unsign (u/s).
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- result unit/source 0 unit/ source 1 unit are independent.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MINSI (14’b 000000000_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
THRES: (OP_CODE[4:0] = ‘h6) Threshold
if (Tn > (or <) thres)
Td<= Tn
else
Td <= 0
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- Sign/unsign for both source and threshold
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: THRES (14’b 000000000_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3 AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
ASUM: (OP_CODE[4:0] = ‘h7) loop = length / esize
for (i=0;i<loop;i++)
Td = TN[i*esize +: esize] + Td
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit supports (u/s)int4/8/16/32/64 and fp16/32/64.
- Source and destination unit are independent.
- Sign/unsign for source/destination and independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ASUM (14’b 000000000_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3 AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
ABS: (OP_CODE[4:0] = ‘h8) Absolute value
- unit supports (s)int4/8/16/32/64 and fp16/32/64
- sign only
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ABS (14’b 000000000_01000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3 AddrSpace -1:2 AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
MEDIAN: (OP_CODE[4:0] = ‘h9)
Median(x,y,z) = x + y + z – Min(x, Min(y,z)) – Max(x, Max(y,z))
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- source0/1/2 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MEDIAN (14’b 000000000_01001)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [6 AddrSpace +31: 5AddrSpace]
- Transfer Length [5AddrSpace -1:4AddrSpace]
- Destination Address [4AddrSpace -1: 3AddrSpace]
- Source 2 Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SIGN: (OP_CODE[4:0] = ‘ha)
Sign(x) = 1 if x>=0
-1 if x<0
- unit supports (u/s)int4/8/16/32/64 and fp16/32/64
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SGT (14’b 000000000_01010)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3 AddrSpace -1:2 AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
POW: (OP_CODE[4:0] = ‘hb) Power function of x^y
- unit supports (u/s)int4/8/16/32/64
- source0 and source 1 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: POW (14’b 000000000_01011)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SQRT: (OP_CODE[4:0] = ‘hc) sqrt(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SQRT (14’b 000000000_01100)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
RSQRT: (OP_CODE[4:0] = ‘hd) rsqrt function of rsqrt(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RSQRT (14’b 000000000_01101)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
COS_SIM: (OP_CODE[4:0] = ‘he) get cos sim function of cos_sim(x,y)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: COS_SIM (14’b 000000000_01110)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1:AddrSpace]
- Source 0 Address [AddrSpace -1:0]
RECIPROCAL: (OP_CODE[4:0] = ‘hf) function of 1/x
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RECIPROCAL (14’b 000000000_01111)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Logic instructions
The instructions in this section include the bitwise logic operation instructions.
OP_CODE[13:5] = 9’b1
AND: (OP_CODE[4:0] = ‘h0) Bit-wise &
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: AND (14’b 000000001_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Note: Transfer length unit is Byte
OR: (OP_CODE[4:0] = ‘h1) Bit-wise |
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: OR (14’b 000000001_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Note: Transfer length unit is Byte
XOR: (OP_CODE[4:0] = ‘h2) Bit-wise ^
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: XOR (14’b 000000001_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Note: Transfer length unit is Byte
INV: (OP_CODE[4:0] = ‘h3) Bit-wise ~
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: INV (14’b 000000001_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Note: Transfer length unit is Byte
BCLR: (OP_CODE[4:0] = ‘h4) Bit-wise |~
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: BCLR (14’b 000000001_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Note: Transfer length unit is Byte
BSET: (OP_CODE[4:0] = ‘h5) Bit-wise &~
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: BSET (14’b 000000001_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Transfer Length [4AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Note: Transfer length unit is Byte
Shift instructions
The instructions in this section include the elementwise shift instructions.
OP_CODE[13:5] = 9’b10
ASR: (OP_CODE[4:0] = ‘h0) Arithmetic shift right
- Units support 4/8/16/32
- rounding/no rounding
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ASR (14’b 000000010_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
ASL: (OP_CODE[4:0] = ‘h1) Arithmetic shift left
- Units support 4/8/16/32/64
- saturation/no saturation
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ASL (14’b 000000010_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
LSR: (OP_CODE[4:0] = ‘h2) Logical shift right
- Units support 4/8/16/32/64
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LSR (14’b 000000010_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
LSL: (OP_CODE[4:0] = ‘h3) Logical shift left
- Units support 4/8/16/32/64
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LSL (14’b 000000010_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
ROR: (OP_CODE[4:0] = ‘h4) Rotate shift right
- Units support 4/8/16/32/64
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ROR (14’b 000000010_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Narrow/Extension instructions
The instructions in this section include the elementwise narrow/extension instructions. OP_CODE[13:5] = 9’b11
NSR: (OP_CODE[4:0] = ‘h0) shift right with rounding and saturation
- Sign/unsign
- 64->32
- 32->16
- 16->8
- 8->4
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: NSR (14’b 000000011_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SXT: (OP_CODE[4:0] = ‘h1) Sign extension
- source unit can be 4/8/16/32bits
- destination unit can be 8/16/32/64bits
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SXT (14’b 000000011_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
UXT: (OP_CODE[4:0] = ‘h2) Unsign extension
- source unit can be 4/8/16/32bits
- destination unit can be 8/16/32/64bits
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: UXT (14’b 000000011_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
DIV/MOD instructions
The instructions in this section include the elementwise DIV/MOD instructions.
OP_CODE[13:5] = 9’b100
DIV: (OP_CODE[4:0] = ‘h0)
- 4/8/16/32/64bits (including fp)
- sign/unsign
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: DIV (14’b 000000100_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
MOD: (OP_CODE[4:0] = ‘h1)
- 4/8/16/32/64bits (including fp)
- sign/unsign
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MOD (14’b 000000100_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
MUL instructions
The instructions in this section include the elementwise MUL instructions.
OP_CODE[13:5] = 9’b101
MUL: (OP_CODE[4:0] = ‘h0)
Td[2esize-1:0] = Tm[esize-1:0] * Tn[esize-1:0]
- 4/8/16/32/64bits (including fp)
- sign/unsign
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MUL (14’b 000000101_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Reduction instructions
The instructions in this section include the reduction operation instructions.
OP_CODE[13:5] = 9’b110
REDUCE_ALL (OP_CODE[4:0] = ‘h0)
- Tests if all elements in input evaluate to True.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_ALL (14’b 000000110_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Note:
- OP Mode:{src_unit[3:0],axis[2:0]}
- src_unit is for Source and Destination data unit
REDUCE_ANY: (OP_CODE[4:0] = ‘h1)
- Tests if any element in input evaluates to True.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_ANY (14’b 000000110_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
REDUCE_MEAN: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_MEAN (14’b 000000110_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
REDUCE_MAX: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_MAX (14’b 000000110_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
REDUCE_MIN: (OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_MIN (14’b 000000110_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
REDUCE_PROD: (OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_PROD (14’b 000000110_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
REDUCE_SUM: (OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_SUM (14’b 000000110_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
REDUCE_VAR: (OP_CODE[4:0] = ‘h7)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REDUCE_VAR (14’b 000000110_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+95: 2AddrSpace+64]
- {FC[11:0],FH[11:0],FW[11:0]} [2AddrSpace+63: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Branch instructions
The instructions in this section include the branch operation instructions.
OP_CODE[13:5] = 9’b111
CASE: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CASE (14’b 000000111_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
COND: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: COND (14’b 000000111_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
SWITCH_CASE: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SWITCH_CASE (14’b 000000111_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
WHILE_LOOP: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: WHILE_LOOP (14’b 000000111_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Indexing, Slicing, Joining, Mutating instructions
The instructions in this section include the Indexing, Slicing, Joining operation instructions.
OP_CODE[13:5] = 9’b1000
CONCAT: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CONCAT (14’b 00000_1000_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +95: 3AddrSpace + 64]
- {FC0[11:0],FH0[11:0],FW0[11:0],FC1[11:0],FH1[11:0]} [3AddrSpace+63: 3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],axis[2:0],FW1[11:0]}
GATHER: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: GATHER (14’b 00000_1000_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +63: 3AddrSpace + 32]
- {FC[11:0],FH[11:0]} [3AddrSpace+31: 3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Index Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],axis[2:0],FW[11:0],Index_Len[11:0]}
GATHER_ND: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: GATHER_ND (14’b 00000_1000_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +63: 3AddrSpace + 32]
- {FC[11:0],FH[11:0]} [3AddrSpace+31: 3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Index Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],Index_Len[11:0]}
SCATTER: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SCATTER (14’b 00000_1000_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +63: 3AddrSpace + 31]
- Source Length [3AddrSpace + 31,3AddrSpace]
- Update Address[3AddrSpace -1: 2AddrSpace]
- Index Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],Index_Len[11:0]}
- The length of index is equal to update length
SCATTER_ND: (OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SCATTER_ND (14’b 00000_1000_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
SPLIT: (OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SPLIT (14’b 00000_1000_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +63: 3AddrSpace + 32]
- {FC[11:0],FH[11:0]} [3AddrSpace +31: 3AddrSpace]
- Destination 1 Address [3AddrSpace -1: 2AddrSpace]
- Destination 0 Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],Axis[2:0],Split_Index[11:0]}
SLICE: (OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SLICE (14’b 00000_1000_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +63: 3AddrSpace + 32]
- {FC[11:0],FH[11:0]} [3AddrSpace +31: 3AddrSpace]
- Destination 1 Address [3AddrSpace -1: 2AddrSpace]
- Destination 0 Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],Axis[2:0],Slice_Index[11:0]}
TRANSPOSE: (OP_CODE[4:0] = ‘h7)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TRANSPOSE (14’b 00000_1000_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace+63: 2AddrSpace+32]
- {FC[11:0],FH[11:0],P0[2:0],P1[2:0],P2[2:0],P3:[2:0]} [2AddrSpace+31: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],FN[11:0]}
RESHAPE: (OP_CODE[4:0] = ‘h8)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RESHAPE (14’b 00000_1000_01000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
SQUEEZE: (OP_CODE[4:0] = ‘h9)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SQUEEZE (14’b 00000_1000_01001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
UNSQUEEZE: (OP_CODE[4:0] = ‘ha)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: UNSQUEEZE (14’b 00000_1000_01010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace+31: 4AddrSpace]
- USER DEFINE
UNSTACK: (OP_CODE[4:0] = ‘hb)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: UNSTACK (14’b 00000_1000_01011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
STACK: (OP_CODE[4:0] = ‘hc)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: STACK (14’b 00000_1000_01100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace+63: 3AddrSpace+32]
- {FC[11:0],FH[11:0],Axis[2:0]} [3AddrSpace+31: 3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],FN[11:0]}
TILE: (OP_CODE[4:0] = hd)
Instruction format:
-
OP_SECTION: BASE SECTION (6’b11_1111)
-
AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
-
OP_CODE: TILE (14’b 00000_1000_01101)
-
SYNC_CTRL: refer to SYNC CTRL format
-
OPERAND DESCRIPTOR: The address of Operand Table
-
OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
-
OP Mode [2AddrSpace+63: 2AddrSpace+32]
-
{FC[11:0],FH[11:0],Repeat_num[8:0]} [2AddrSpace+31: 2AddrSpace]
-
Destination Address [2AddrSpace -1: AddrSpace]
-
Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],FN[11:0]}
PAD: (OP_CODE[4:0] = ‘he)
Instruction format:
-
OP_SECTION: BASE SECTION (6’b11_1111)
-
AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
-
OP_CODE: PAD (14’b 00000_1000_01110)
-
SYNC_CTRL: refer to SYNC CTRL format
-
OPERAND DESCRIPTOR: The address of Operand Table
-
OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
-
OP Mode [2AddrSpace+63: 2AddrSpace+32]
-
{FC[11:0],FH[11:0],PW0[3:0],PW1[3:0]} [2AddrSpace+31: 2AddrSpace]
-
Destination Address [2AddrSpace -1: AddrSpace]
-
Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],PH0[3:0],PH1[3:0]}
ROLL: (OP_CODE[4:0] = ‘hf)
Instruction format:
-
OP_SECTION: BASE SECTION (6’b11_1111)
-
AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
-
OP_CODE: ROLL (14’b 00000_1000_01111)
-
SYNC_CTRL: refer to SYNC CTRL format
-
OPERAND DESCRIPTOR: The address of Operand Table
-
OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
-
OP Mode [2AddrSpace+63: 2AddrSpace+32]
-
{FC[11:0],FH[11:0],SHIFT_C[5:0],SHIFT_H[5:0]} [2AddrSpace+31: 2AddrSpace]
-
Destination Address [2AddrSpace -1: AddrSpace]
-
Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],SHIFT_W[5:0]}
- SHIFT_* is sign data
SIGN: (OP_CODE[4:0] = ‘h10)
- return the sign bit of input datas
Instruction format:
-
OP_SECTION: BASE SECTION (6’b11_1111)
-
AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
-
OP_CODE: SIGN (14’b 00000_1000_10000)
-
SYNC_CTRL: refer to SYNC CTRL format
-
OPERAND DESCRIPTOR: The address of Operand Table
-
OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
-
OP Mode [2AddrSpace+63: 2AddrSpace+32]
-
Data Length [2AddrSpace+31: 2AddrSpace]
-
Destination Address [2AddrSpace -1: AddrSpace]
-
Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0]}
WHERE: (OP_CODE[4:0] = ‘h11)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: WHERE (14’b 000001000_10001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
FLATTEN: (OP_CODE[4:0] = ‘h12)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: FLATTEN (14’b 00000_1000_10010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
EXPAND_DIM: (OP_CODE[4:0] = ‘h13)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: EXPAND_DIM (14’b 00000_1000_10011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
REVERSE: (OP_CODE[4:0] = ‘h14)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: REVERSE (14’b 00000_1000_10100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace+63: 3AddrSpace+32]
- {FC[11:0],FH[11:0],Axis[2:0]} [3AddrSpace+31: 3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_data_unit[3:0],FW[11:0],FN[11:0]}
Roundup instructions
The instructions in this section include the roundup operation instructions.
OP_CODE[13:5] = 9’b1001
ROUND: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ROUND (14’b 00000_1001_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
CEIL: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CEIL (14’b 00000_1001_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
FLOOR: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: FLOOR (14’b 00000_1001_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
CLIP: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CLIP (14’b 00000_1001_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {CLIP_MIN[15:0], CLIP_MAX[15:0]} [3AddrSpace +63: 3AddrSpace + 32]
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
DATA CONVERSION instruction
The instructions in this section include Data unit conversion operation.
OP_CODE[13:5] = 9’b1010
DATA_CONVERT: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: DATA_CONVERT (14’b 00000_1010_00000)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Note:
- OP Mode: {Destination_data_unit[3:0],Source_data_unit[3:0]}
- UNIT[3:0]: indicate the data unit for the operation
-
- 0000 -> uint4
-
- 0001 -> uint8
-
- 0010 -> uint16
-
- 0011 -> uint32
-
- 0100 -> uint64
-
- 0101 -> sint4
-
- 0110 -> sint8
-
- 0111 -> sint16
-
- 1000 -> sint32
-
- 1001 -> sint64
-
- 1010 -> fp16
-
- 1011 -> fp32
-
- 1100 -> fp64
- Others -> reserved
Matrix_Multiply instructions
The instructions in this section include the Matrix Multiply instructions without quantization output. The output is always 32 bits.
OP_CODE[13:5] = 9’b1011
Matrix_Mul: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: Matrix_Mul (14’b 00000_1011_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {K_NUM[11:0], K_LINE_STRIDE[19:0]} [3* AddrSpace +191 + max(32, AddrSpace): 3AddrSpace+160+ max(32, AddrSpace)]
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [3 AddrSpace +159 + max(32, AddrSpace): 3AddrSpace+128+ max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [3 AddrSpace +127 + max(32, AddrSpace): 3AddrSpace+96+ max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [3 AddrSpace +95 + max(32, AddrSpace): 3AddrSpace+64+ max(32, AddrSpace)]
- {Padding Address} [3 AddrSpace +63 + max(32, AddrSpace): 3AddrSpace+64]
- Padding Mode [3 AddrSpace +63: 3AddrSpace+32]
- Data Mode [3 AddrSpace +31: 3AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Kernel Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
- Data Mode: {Data_format[1:0], result_unit[3:0], w_unit[3:0], fm_unit[3:0]}
- SET KW/KH to be 1, to get GEMM
- set KW/KH > 1, to get a CONV2D without quantization
LU: (OP_CODE[4:0] = ‘h1)
- Computes the LU factorization of a matrix or batches of matrices A. Returns a tuple containing the LU factorization and pivots of A. Pivoting is done if pivot is set to True.
instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LU (14’b 00000_1011_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Destination 1 Address [3AddrSpace -1:2AddrSpace]
- Destination 0 Address [2AddrSpace -1: AddrSpace]
- A Address [AddrSpace -1:0]
Note:
- OP Mode: {src_unit[3:0],I_H[11:0],I_W[11:0]}
CHOLESKY: (OP_CODE[4:0] = ‘h2)
- Computes the Cholesky decomposition of a symmetric positive-definite matrix A or for batches of symmetric positive-definite matrices.
instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CHOLESKY (14’b 00000_1011_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace +31: 2AddrSpace]
- Destination Address [2AddrSpace -1:AddrSpace]
- A Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_unit[3:0],I_H[11:0],I_W[11:0],Upper[1:0]}
QR: (OP_CODE[4:0] = ‘h3)
- Computes the QR decomposition of a matrix A.
instruction format:
-
OP_SECTION: BASE SECTION (6’b11_1111)
-
AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
-
OP_CODE: QR (14’b 00000_1011_00011)
-
SYNC_CTRL: refer to SYNC CTRL format
-
OPERAND DESCRIPTOR: The address of Operand Table
-
OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
-
OP Mode [3AddrSpace +31: 3AddrSpace]
-
R Address [3AddrSpace -1:2AddrSpace]
-
Q Address [2AddrSpace -1:AddrSpace]
-
A Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_unit[3:0],I_H[11:0],I_W[11:0]}
NORM: (OP_CODE[4:0] = ‘h4)
- Computes a vector or matrix norm.
instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SVD (14’b 00000_1011_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace +31: 2AddrSpace]
- Destination Address [2AddrSpace -1:AddrSpace]
- Source Address [AddrSpace -1: 0]
Note:
- OP Mode: {src_unit[3:0],I_H[11:0],I_W[11:0],norm_type[2:0],axis[1:0]}
INVERSE: (OP_CODE[4:0] = ‘h5)
- Computes the inverse of a square matrix if it exists
instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: INVERSE (14’b 00000_1011_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace +31: 2AddrSpace]
- Destination Address [2AddrSpace -1:AddrSpace]
- Source Address [AddrSpace -1: 0]
- OP Mode: {src_unit[3:0],I_H[11:0],I_W[11:0]}
LSTSQ: (OP_CODE[4:0] = ‘h6)
- Computes the solution to the least squares and least norm problems for a full rank matrix A of size (m×n) and a matrix B of size(m×k).
instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LSTSQ (14’b 00000_1011_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [2AddrSpace +31: 2AddrSpace]
- Destination Address [2AddrSpace -1:AddrSpace]
- Source Address [AddrSpace -1: 0]
- OP Mode: {src_unit[3:0],m[11:0],n[11:0],k[11:0]}
SOLVE: (OP_CODE[4:0] = ‘h7)
- This function returns the solution to the system of linear equations represented by AX = B and the LU factorization of A, in order as a namedtuple solution, LU.
instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SOLVE (14’b 00000_1011_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
Data Move instructions
The instruction in this section includes the data move instruction which moves data from memory to memory.
OP_CODE[13:5] = 9’b1100
DATA_MOVE: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: DATA_MOVE (14’b 00000_1100_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {DES_line_stride[15:0], DES_Width[15:0]} [2* AddrSpace +223: 2AddrSpace+192]
- {DES_surface_stride[23:0],DES_line_stride[23:16]} [2 AddrSpace + 191: 2AddrSpace + 160]
- {DES_num_trans[7:0],DES_trans_size[23:0]} [2 AddrSpace +159: 2AddrSpace+128]
- {SRC_line_stride[15:0], SRC_Width[15:0]} [2 AddrSpace + 127: 2AddrSpace+96]
- {SRC_surface_stride[23:0],SRC_line_stride[23:16]} [2 AddrSpace +95: 2AddrSpace+64]
- {SRC_num_trans[7:0],SRC_trans_size[23:0]} [2 AddrSpace +63: 2AddrSpace+32]
- OP Mode [2 AddrSpace +31: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Note:
- OP Mode: {transfer_mode[1:0],data_unit[3:0]}
- Transfer_mode[1:0]:
- 00 -> Normal transfer(1/2/3D)
- 01 -> Immediate(1/2/3D)
- 10 -> Upsample (only support 1/2D)
- 11 -> Transpose/transform(1/2/3D)
Resize Instructions
The instructions in this section include Resize functions
OP_CODE[13:5] = 9’b1101
RESIZE_BILINEAR(OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RESIZE_BILINEAR (14’b 00000_1101_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0]} [3AddrSpace +95,3AddrSpace +64]
- {FH[11:0],FW[11:0]} [3AddrSpace +63,3AddrSpace +32]
- Data Mode [3AddrSpace +31: 3AddrSpace]
- OP Mode [3AddrSpace -1 : 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {O_W[11:0], O_H[11:0],Data_format[1:0],Align_corners[1:0]}
- OP Mode: {src_unit[3:0]}
- src_unit is for FM unit and is same with destination data unit
- Data_format[1:0]: 2’b00 -> NHWC; 2’b01 -> NCHW; others -> RESERVED
RESIZE_NEAREST(OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RESIZE_NEAREST (14’b 00000_1101_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0]} [3AddrSpace +95,3AddrSpace +64]
- {FH[11:0],FW[11:0]} [3AddrSpace +63,3AddrSpace +32]
- Data Mode [3AddrSpace +31: 3AddrSpace]
- OP Mode [3AddrSpace -1 : 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {O_W[11:0], O_H[11:0],Data_format[1:0],Align_corners[1:0]}
- OP Mode: {src_unit[3:0]}
- src_unit is for FM unit and is same with destination data unit
- Data_format[1:0]: 2’b00 -> NHWC; 2’b01 -> NCHW; others -> RESERVED
Create instructions
The instructions in this section include the create operation instructions.
OP_CODE[13:5] = 9’b1110
CREATE_TENSOR(OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CREATE_TENSOR (14’b 00000_1110_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
WARP_TENSOR(OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: WARP_TENSOR (14’b 00000_1110_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
ZEROS(OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ZEROS (14’b 00000_1110_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
FULL(OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: FULL (14’b 00000_1110_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
EMPTY(OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: EMPTY (14’b 00000_1110_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
CONTIGUOUS(OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CONTIGUOUS (14’b 00000_1110_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
RAND_UNIFORM(OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RAND_UNIFORM (14’b 00000_1110_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
RAND_NORMAL(OP_CODE[4:0] = ‘h7)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RAND_NORMAL (14’b 00000_1110_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
RAND_BERNOULLI(OP_CODE[4:0] = ‘h8)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RAND_BERNOULLI (14’b 00000_1110_01000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
RAND_BERNOULLI(OP_CODE[4:0] = ‘h9)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RAND_BERNOULLI (14’b 00000_1110_01001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
MULTI_NOMIAL(OP_CODE[4:0] = ‘ha)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MULTI_NOMIAL (14’b 00000_1110_01010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
RAND_PERM(OP_CODE[4:0] = ‘hb)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RAND_PERM (14’b 00000_1110_01011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
RANGE: (OP_CODE[4:0] = ‘hc)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RANGE (14’b 00000_1110_01100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
LINSPACE: (OP_CODE[4:0] = ‘hd)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LINSPACE (14’b 00000_1110_01101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
CREATE_SPARSE_TENSOR: (OP_CODE[4:0] = ‘he)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CREATE_SPARSE_TENSOR (14’b 00000_1110_01110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
CREATE_QUANT_TENSOR: (OP_CODE[4:0] = ‘hf)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CREATE_QUANT_TENSOR (14’b 00000_1110_01111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
DUPLICATE: (OP_CODE[4:0] = ‘h10)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: DUPLICATE (14’b 00000_1110_10000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
CREATE_FROM_DIAG: (OP_CODE[4:0] = ‘h11)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CREATE_FROM_DIAG (14’b 00000_1110_10001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
DESTROY_TENSOR: (OP_CODE[4:0] = ‘h12)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: DESTROY_TENSOR (14’b 00000_1110_10010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Compare instructions
The instructions in this section include the compare operation instructions.
OP_CODE[13:5] = 9’b1111
SEQ: (OP_CODE[4:0] = ‘h0) Set one if equal
- unit supports int4/8/16/32/64 and fp16/32/64
- sign/unsign
- source0 and source 1 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SEQ (14’b 00000_1111_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4* AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SNE: (OP_CODE[4:0] = ‘h1) Set one if not equal
- unit supports int4/8/16/32/64 and fp16/32/64
- sign/unsign
- source0 and source 1 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SNE (14’b 00000_1111_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SLE: (OP_CODE[4:0] = ‘h2) Set one if less than or equal
- unit supports int4/8/16/32/64 and fp16/32/64
- sign/unsign
- source0 and source 1 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SLE (14’b 00000_1111_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SLT: (OP_CODE[4:0] = ‘h3) Set one if less than
- unit supports int4/8/16/32/64 and fp16/32/64
- sign/unsign
- source0 and source 1 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SLT (14’b 00000_1111_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4* AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SGE: (OP_CODE[4:0] = ‘h4) Set one if greater than or equal
- unit supports int4/8/16/32/64 and fp16/32/64
- sign/unsign
- source0 and source 1 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SGE (14’b 00000_1111_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
SGT: (OP_CODE[4:0] = ‘h5) Set one if greater than
- unit supports int4/8/16/32/64 and fp16/32/64
- sign/unsign
- source0 and source 1 are independent for unit/sign/unsign
- result unit is independent
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SGT (14’b 00000_1111_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2AddrSpace]
- Source 1 Address [2 AddrSpace -1: AddrSpace]
- Source 0 Address [AddrSpace -1:0]
Trigonometric instructions
The instructions in this section include the trigonometric operation instructions.
OP_CODE[13:5] = 9’b10000
SIN: (OP_CODE[4:0] = ‘h0) Sin function of sin(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SIN (14’b 0000_10000_00000)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
COS: (OP_CODE[4:0] = ‘h1) Cos function of cos(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: COS (14’b 0000_10000_00001)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
TAN: (OP_CODE[4:0] = ‘h2) tan function of tan(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TAN (14’b 0000_10000_00010)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ASIN: (OP_CODE[4:0] = ‘h3) asin function of asin(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ASIN (14’b 0000_10000_00011)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ACOS: (OP_CODE[4:0] = ‘h4) acos function of acos(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ACOS (14’b 0000_10000_00100)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ATAN: (OP_CODE[4:0] = ‘h5) atan function of atan(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ATAN (14’b 0000_10000_00101)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Hyperbolic instructions
The instructions in this section include the hyperbolic operation instructions.
OP_CODE[13:5] = 9’b10001
SINH: (OP_CODE[4:0] = ‘h0) sinh function of sinh(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SINH (14’b 0000_10001_00000)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
COSH: (OP_CODE[4:0] = ‘h1) cosh function of cosh(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: COSH (14’b 0000_10001_00001)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
TANH: (OP_CODE[4:0] = ‘h2) tanh function of tanh
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TANH (14’b 0000_10001_00010)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ASINH: (OP_CODE[4:0] = ‘h3) asinh function of asinh
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ASINH (14’b 0000_10001_00011)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ACOSH: (OP_CODE[4:0] = ‘h4) acosh function of acosh
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ACOSH (14’b 0000_10001_00100)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ATANH: (OP_CODE[4:0] = ‘h5) atanh function of atanh
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ATANH (14’b 0000_10001_00101)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Exponential power instructions
The instructions in this section include the exponential power operation instructions.
OP_CODE[13:5] = 9’b10010
EXP: (OP_CODE[4:0] = ‘h0) exp function of exp(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: EXP (14’b 0000_10010_00000)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
EXPML: (OP_CODE[4:0] = ‘h1) expml function of expml(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: EXPML (14’b 0000_10010_00001)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
LOG: (OP_CODE[4:0] = ‘h2) log function of ln(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LOG (14’b 0000_10010_00010)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
LOGLP: (OP_CODE[4:0] = ‘h3) loglp function of loglp(x)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LOGLP (14’b 0000_10010_00011)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
LOG10: (OP_CODE[4:0] = ‘h4) log10 function of log10
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LOG10 (14’b 0000_10010_00100)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
LOG2: (OP_CODE[4:0] = ‘h5) log2 function of log2
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LOG2 (14’b 0000_10010_00101)
- SYNC_CTRL: refer to Figure 7 SYNC CTRL format
- OPERAND BASE ADDR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Index instructions
The instructions in this section include the basic index functions.
OP_CODE[13:5] = 9’10011
ARG_MAX (OP_CODE[4:0] = ‘h0)
- Returns the indices of the maximum value of all elements in the input tensor.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ARG_MAX (14’b 0000_10011_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3 AddrSpace +31: 3AddrSpace]
- Transfer Length [3 AddrSpace -1:2 AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ARG_MIN: (OP_CODE[4:0] = ‘h1)
- Returns the indices of the minimum value of all elements in the input tensor.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ARG_MIN (14’b 0000_10011_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3AddrSpace -1:2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
ARG_SORT: (OP_CODE[4:0] = ‘h2)
- Returns the indices that sort a tensor in ascending order by value.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ARG_SORT (14’b 0000_10011_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination 1 Address [3 AddrSpace -1: 2AddrSpace]
- Destination 0 Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Note:
- OP Mode {src_unit[3:0]}
- Destination 0 is the sorted datas
- Destination 1 is the index datas
TOPK: (OP_CODE[4:0] = ‘h3)
- Returns the k largest elements of the given input tensor.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TOPK (14’b 0000_10011_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [4 AddrSpace +31: 4AddrSpace]
- Transfer Length [4 AddrSpace -1:3 AddrSpace]
- Destination 1 Address [3 AddrSpace -1: 2AddrSpace]
- Destination 0 Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Note:
- OP Mode {src_unit[3:0],k[11:0]}
- Destination 0 is the topk datas
- Destination 21 is the index datas
NON_ZERO: (OP_CODE[4:0] = ‘h4)
- Returns a tensor containing the indices of all non-zero elements of input.
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: NON_ZERO (14’b 0000_10011_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- OP Mode [3AddrSpace +31: 3AddrSpace]
- Transfer Length [3 AddrSpace -1:2 AddrSpace]
- Destination 0 Address [2 AddrSpace -1: AddrSpace]
- Source Address [AddrSpace -1:0]
Signal instructions
The instructions in this section include the basic signal functions.
OP_CODE[13:5] = 9’b10100
FFT: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: FFT (14’b 0000_10100_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
IFFT: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: IFFT (14’b 0000_10100_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
Query instructions
The instructions in this section include the basic query functions.
OP_CODE[13:5] = 9’b10101
SHAPE: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SHAPE (14’b 0000_10101_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
IS_EMPTY: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: IS_EMPTY (14’b 0000_10101_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
IS_FINITE: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: IS_FINITE (14’b 0000_10101_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
IS_EMPTY: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: IS_EMPTY (14’b 0000_10101_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
IS_CONTIGUROUS: (OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: IS_CONTIGUROUS (14’b 0000_10101_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
RANK: (OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RANK (14’b 0000_10101_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
SIZE: (OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SIZE (14’b 0000_10101_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
HAS_INF: (OP_CODE[4:0] = ‘h7)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: HAS_INF (14’b 0000_10101_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
HAS_NAN: (OP_CODE[4:0] = ‘h8)
Instruction format:
- OP_SECTION: BASE SECTION (6’b11_1111)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: HAS_NAN (14’b 0000_10101_01000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
AI Instructions
AI section instructions include the OPs used in the AI domain.
Activation instructions
The instructions in this section include the basic activation functions.
OP_CODE[13:5] = 9’b0
RELU: (OP_CODE[4:0] = ‘h0)
Relu(x) = x if x>0
0 if x<=0
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RELU (14’b 00_0000_0000_0000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3* AddrSpace +31: 3AddrSpace]
- operation length [3 AddrSpace -1: 2AddrSpace]
- destination address [2 AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
Note:
- This is also applied to all the following instructions
- SRC_UNIT[3:0]: indicate the data unit for the operation, for both source and destination
- 0000 -> uint4
- 0001 -> uint8
- 0010 -> uint16
- 0011 -> uint32
- 0100 -> uint64
- 0101 -> sint4
- 0110 -> sint8
- 0111 -> sint16
- 1000 -> sint32
- 1001 -> sint64
- 1010 -> fp16
- 1011 -> fp32
- 1100 -> fp64
- Others -> reserved
- operation length indicates the number of units/element to operate
PRELU: (OP_CODE[4:0] = ‘h1)
Prelu(x) = x if x>0
ax if x<=0
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: PRELU (14’b 00_0000_0000_0001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {Shift value address} [5 AddrSpace +31: 4 AddrSpace+32]
- {Multiplicator address} [4 AddrSpace +31: 3 AddrSpace+32]
- {RSVD, data_format[1:0], Valid_length[11:0], B, I, M_UNIT[3:0], S_UNIT[3:0], SRC_UNIT[3:0]} [3 AddrSpace + 31:3 AddrSpace]
- operation length [3 AddrSpace -1: 2AddrSpace]
- destination address [2 AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
Note:
- Data_format[1:0]: 2’b00 -> NHWC; 2’b01 -> NCHW; others -> RESERVED
- S_unit[3:0]: the unit of shift. (only int, used for quantization)
- M_unit[3:0]: the unit of mulplication
- I: immediate mode which indicate per layer PRELU.
- B: Broadcast mode which indicate per layer (with I set) or per channel (with I not set).
- Valid_length: Channel number.
ELU: (OP_CODE[4:0] = ‘h2)
Elu(x) = x if x>0
a(exp(x)-1) if x<=0
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ELU (14’b 00_0000_0000_0010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the
instruction) - {RSVD, SRC_UNIT[3:0],A_UNIT[3:0]} [3AddrSpace +63: 3AddrSpace + 32]
- alpha [3AddrSpace + 31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- destination address [2AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
Note:
- A_unit[3:0]: the unit of alpha. (only float)
HARD_SIGMOID: (OP_CODE[4:0] = ‘h3)
HardSigmoid(x) = 1 if x>=3
0 if x<=-3
ax + b others
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: HARD_SIGMOID (14’b 00_0000_0000_0011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0],A_UNIT[3:0],b_UNIT[3:0]} [3* AddrSpace +95: 3AddrSpace + 64]
- b [3 AddrSpace + 63: 3AddrSpace + 32]
- a [3 AddrSpace + 31: 3AddrSpace ]
- operation length [3 AddrSpace -1: 2AddrSpace]
- destination address [2 AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
Note:
- A_UNIT[3:0]: The unit of a,Only float data,default value is 1/6;
- B_UNIT[3:0]: The unit of b,Only float data,default value is 0.5;
SELU: (OP_CODE[4:0] = ‘h4)
Selu(x) = gamma * x if x > 0
gamma * (a *(exp(x) -1)) if x <= 0
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SELU (14’b 00_0000_0000_0100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0],A_UNIT[3:0],G_UNIT[3:0]} [3* AddrSpace +95: 3AddrSpace + 64]
- a [3 AddrSpace + 63,3 AddrSpace + 32]
- gamma [3 AddrSpace + 31,3 AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- destination address [2 AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
Note:
- A_UNIT[3:0]: The unit of a, only support float data,default value is 1.0507
- G_UNIT[3:0]: The unit of gamma, only support float data,default value is 1.6732
SIGMOID: (OP_CODE[4:0] = ‘h5)
Sigmoid(x) = 1/(1+exp(-x))
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SIGMOID (14’b 00_0000_0000_0101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- destination address [2AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
TANH: (OP_CODE[4:0] = ‘h6)
TanH(x) = (exp(x)-exp(-x))/(exp(x) + exp(-x))
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TANH (14’b 00_0000_0000_0110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- destination address [2AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
SOFTPLUS: (OP_CODE[4:0] = 'h7)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SOFTPLUS (14’b 00_0000_0000_0111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3 AddrSpace -1: 2AddrSpace]
- destination address [2 AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
SOFTMAX: (OP_CODE[4:0] = ‘h8)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SOFTMAX (14’b 00_0000_0000_1000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0]} [2AddrSpace +63,2AddrSpace +32]
- Data Mode [2AddrSpace +31: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {I_H[11:0], I_W[11:0],Data_format[1:0],Axis[2:0],SRC_UNIT[3:0]}
LOGSOFTMAX: (OP_CODE[4:0] = ‘h9)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LOGSOFTMAX (14’b 00_0000_0000_1001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0]} [2AddrSpace +63,2AddrSpace +32]
- Data Mode [2AddrSpace +31: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {I_H[11:0], I_W[11:0],Data_format[1:0],Axis[2:0],SRC_UNIT[3:0]}
SOFT_SIGN: (OP_CODE[4:0] = ‘ha)
Soft_sign = x/(1+abs(x))
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SOFT_SIGN (14’b 00_0000_0000_1010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3 AddrSpace -1: 2AddrSpace]
- destination address [2 AddrSpace -1: AddrSpace]
- source address [AddrSpace -1:0]
RELU6: (OP_CODE[4:0] = ‘hb)
f(x) = 6 if x > 6
0 else if x <= 0
x else
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RELU6 (14’b 00_0000_0000_1011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
THRESHOLD_RELU: (OP_CODE[4:0] = ‘hc)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: THRESHOLD_RELU (14’b 00_0000_0000_1100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
LEAKY_RELU: (OP_CODE[4:0] = ‘hd)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LEAKY_RELU (14’b 00_0000_0000_1101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
BRELU: (OP_CODE[4:0] = ‘he)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: BRELU (14’b 00_0000_0000_1110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
GELU: (OP_CODE[4:0] = ‘hf)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: GELU (14’b 00_0000_0000_1111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
SWISH: (OP_CODE[4:0] = ‘h10)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SWISH (14’b 00_0000_0001_0000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
HARD_SWISH: (OP_CODE[4:0] = ‘h11)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: HARD_SWISH (14’b 00_0000_0001_0001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
ERF: (OP_CODE[4:0] = ‘h12)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ERF (14’b 00_0000_0001_0010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
HARD_SHRINK: (OP_CODE[4:0] = ‘h13)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: HARD_SHRINK (14’b 00_0000_0001_0011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
TANH_SHRINK: (OP_CODE[4:0] = ‘h14)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TANH_SHRINK (14’b 00_0000_0001_0100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
HARD_TANH: (OP_CODE[4:0] = ‘h15)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: HARD_TANH (14’b 00_0000_0001_0101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {RSVD, SRC_UNIT[3:0]} [3AddrSpace +31: 3AddrSpace]
- operation length [3AddrSpace -1: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Elementwise Arithmetic instructions (with quantization)
The instructions in this section include the elementwise arithmetic instructions with quantization output.
OP_CODE[13:5] = 9’b1
ELE_ADD: (OP_CODE[4:0] = ‘h0) Elementwise ADD for sign/unsign (u/s)
- unit supports 4/8/16/32/64bits (including fp)
- quantization result output
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ELE_ADD (14’b 00_0000_0010_0000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {CLIP_MIN[15:0], CLIP_MAX[15:0]} [4* AddrSpace +159: 4*AddrSpace+128]
- {IZERO_IMM[7:0], OZERO_IMM[7:0], SHIFT_IMM[7:0]} [4* AddrSpace +127: 4*AddrSpace+96]
- {Multiplicator IMM} [4* AddrSpace +95: 4*AddrSpace+32]
- {RSVD, Data_format[1:0], Valid_length[11:0], B, I, M_UNIT[3:0], DES_UNIT[3:0],SRC1_UNIT[3:0],SRC0_UNIT[3:0]} [4* AddrSpace + 31:4*AddrSpace]
- operation length [4* AddrSpace -1: 3*AddrSpace]
- destination address [3* AddrSpace -1: 2*AddrSpace]
- source address1 [2* AddrSpace -1: AddrSpace]
- source address0 [AddrSpace -1:0]
Note:
- Data_format[1:0]: 2’b00 -> NHWC; 2’b01 -> NCHW; others -> RESERVED
- M_unit[3:0]: the unit of multiplicand of quantization.
- I: immediate mode which indicate the data read from source 1 is added to all the source0 data.
- B: Broadcast mode which indicate per layer (with I set) or per channel (with I not set).
- Valid_length: Channel number.
- IZERO_IMM, OZERO_IMM, SHIFT_IMM, CLIP_MIN/MAX, MUL are all per layer value.
ELE_SUB: (OP_CODE[4:0] = ‘h1) Elementwise SUB for sign/unsign (u/s)
- unit supports 4/8/16/32/64bits (including fp)
- quantization result output
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ELE_SUB (14’b 00_0000_0010_0001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {CLIP_MIN[15:0], CLIP_MAX[15:0]} [4* AddrSpace +159: 4*AddrSpace+128]
- {IZERO_IMM[7:0], OZERO_IMM[7:0], SHIFT_IMM[7:0]} [4* AddrSpace +127: 4*AddrSpace+96]
- {Multiplicator IMM} [4* AddrSpace +95: 4*AddrSpace+32]
- {RSVD, Data_format[1:0], Valid_length[11:0], B, I, M_UNIT[3:0], DES_UNIT[3:0],SRC1_UNIT[3:0],SRC0_UNIT[3:0]} [4* AddrSpace + 31:4*AddrSpace]
- operation length [4* AddrSpace -1: 3*AddrSpace]
- destination address [3* AddrSpace -1: 2*AddrSpace]
- source address1 [2* AddrSpace -1: AddrSpace]
- source address0 [AddrSpace -1:0]
Note:
- Data_format[1:0]: 2’b00 -> NHWC; 2’b01 -> NCHW; others -> RESERVED
- M_unit[3:0]: the unit of multiplicand of quantization.
- I: immediate mode which indicate the data read from source 1 is added to all the source0 data.
- B: Broadcast mode which indicate per layer (with I set) or per channel (with I not set).
- Valid_length: Channel number.
- IZERO_IMM, OZERO_IMM, SHIFT_IMM, CLIP_MIN/MAX, MUL are all per layer value.
CONV instructions
The instructions in this section include the CONV instructions with quantization output.
OP_CODE[13:5] = 9’b10
CONV2D: (OP_CODE[4:0] = ‘h0) CONV 2D operation
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CONV_2D (14’b 000000010_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {CLIP_MIN[15:0], CLIP_MAX[15:0]} [3 AddrSpace +255 + 5 max(32, AddrSpace): 3 AddrSpace+224+ 5 max(32, AddrSpace)]
- {K_NUM[11:0], K_LINE_STRIDE[19:0]} [3 AddrSpace +223 + 5 max(32, AddrSpace): 3 AddrSpace+192+ 5 max(32, AddrSpace)]
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [3 AddrSpace +191 + 5 max(32, AddrSpace): 3 AddrSpace+160+ 5 max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [3 AddrSpace +159 + 5 max(32, AddrSpace): 3 AddrSpace+128+ 5 max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [3 AddrSpace +127 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 5 max(32, AddrSpace)]
- {SCALE_O_ADDR} [3 AddrSpace +95 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 4 max(32, AddrSpace)]
- {SHIFT_ADDR} [3 AddrSpace +95 + 4 max(32, AddrSpace): 3 AddrSpace+96+ 3 max(32, AddrSpace)]
- {Mul_ADDR} [3 AddrSpace +95 + 3 max(32, AddrSpace): 3 AddrSpace+96+ 2 max(32, AddrSpace)]
- {BIAS_ADDR} [3 AddrSpace +95 + 2 max(32, AddrSpace): 3 AddrSpace+96+ max(32, AddrSpace)]
- {Padding Address} [3 AddrSpace +95 + max(32, AddrSpace): 3 AddrSpace+96]
- Padding Mode [3 AddrSpace +95: 3 AddrSpace+64]
- Data Mode [3 AddrSpace +63: 3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2 AddrSpace]
- Kernel Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- Data Mode: {Data_format[1:0], scale_mode[1:0], shift_mode[1:0], mul_mode[1:0], bias_mode[1:0], scale_unit[3:0], mul_unit[3:0], bias_unit[3:0], result_unit[3:0], w_unit[3:0], fm_unit[3:0]}
- scale_mode/shift_mode/mul_mode/bias_mode:
- 00 -> IMM mode/Per layer.
- 01 -> per_channel
- 10 -> per element
- 11 -> reserved
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
DEP_CONV: (OP_CODE[4:0] = ‘h1) DEP_CONV operation
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: DEP_CONV (14’b 000000010_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {CLIP_MIN[15:0], CLIP_MAX[15:0]} [3 AddrSpace +255 + 5 max(32, AddrSpace): 3 AddrSpace+224+ 5 max(32, AddrSpace)]
- {K_NUM[11:0], K_LINE_STRIDE[19:0]} [3 AddrSpace +223 + 5 max(32, AddrSpace): 3 AddrSpace+192+ 5 max(32, AddrSpace)]
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [3 AddrSpace +191 + 5 max(32, AddrSpace): 3 AddrSpace+160+ 5 max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [3 AddrSpace +159 + 5 max(32, AddrSpace): 3 AddrSpace+128+ 5 max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [3 AddrSpace +127 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 5 max(32, AddrSpace)]
- {SCALE_O_ADDR} [3 AddrSpace +95 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 4 max(32, AddrSpace)]
- {SHIFT_ADDR} [3 AddrSpace +95 + 4 max(32, AddrSpace): 3 AddrSpace+96+ 3 max(32, AddrSpace)]
- {Mul_ADDR} [3 AddrSpace +95 + 3 max(32, AddrSpace): 3 AddrSpace+96+ 2 max(32, AddrSpace)]
- {BIAS_ADDR} [3 AddrSpace +95 + 2 max(32, AddrSpace): 3 AddrSpace+96+ max(32, AddrSpace)]
- {Padding Address} [3 AddrSpace +95 + max(32, AddrSpace): 3 AddrSpace+96]
- Padding Mode [3 AddrSpace +95: 3 AddrSpace+64]
- Data Mode [3 AddrSpace +63: 3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2 AddrSpace]
- Kernel Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- Data Mode: {Data_format[1:0], scale_mode[1:0], shift_mode[1:0], mul_mode[1:0], bias_mode[1:0], scale_unit[3:0], mul_unit[3:0], bias_unit[3:0], result_unit[3:0], w_unit[3:0], fm_unit[3:0]}
- scale_mode/shift_mode/mul_mode/bias_mode:
- 00 -> IMM mode/Per layer.
- 01 -> per_channel
- 10 -> per element
- 11 -> reserved
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
Transpose_CONV: (OP_CODE[4:0] = ‘h2) Transpose_CONV operation
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TRANPOSE_CONV (14’b 000000010_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {CLIP_MIN[15:0], CLIP_MAX[15:0]} [3 AddrSpace +255 + 5 max(32, AddrSpace): 3 AddrSpace+224+ 5 max(32, AddrSpace)]
- {K_NUM[11:0], K_LINE_STRIDE[19:0]} [3 AddrSpace +223 + 5 max(32, AddrSpace): 3 AddrSpace+192+ 5 max(32, AddrSpace)]
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [3 AddrSpace +191 + 5 max(32, AddrSpace): 3 AddrSpace+160+ 5 max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [3 AddrSpace +159 + 5 max(32, AddrSpace): 3 AddrSpace+128+ 5 max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [3 AddrSpace +127 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 5 max(32, AddrSpace)]
- {SCALE_O_ADDR} [3 AddrSpace +95 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 4 max(32, AddrSpace)]
- {SHIFT_ADDR} [3 AddrSpace +95 + 4 max(32, AddrSpace): 3 AddrSpace+96+ 3 max(32, AddrSpace)]
- {Mul_ADDR} [3 AddrSpace +95 + 3 max(32, AddrSpace): 3 AddrSpace+96+ 2 max(32, AddrSpace)]
- {BIAS_ADDR} [3 AddrSpace +95 + 2 max(32, AddrSpace): 3 AddrSpace+96+ max(32, AddrSpace)]
- {Padding Address} [3 AddrSpace +95 + max(32, AddrSpace): 3 AddrSpace+96]
- Padding Mode [3 AddrSpace +95: 3 AddrSpace+64]
- Data Mode [3 AddrSpace +63: 3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2 AddrSpace]
- Kernel Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- Data Mode: {enlargeV_scale[4:0], enlarge_H_scale[4:0], Data_format[1:0], scale_mode[1:0], shift_mode[1:0], mul_mode[1:0], bias_mode[1:0], scale_unit[3:0], mul_unit[3:0], bias_unit[3:0], result_unit[3:0], w_unit[3:0], fm_unit[3:0]}
- scale_mode/shift_mode/mul_mode/bias_mode:
- 00 -> IMM mode/Per layer.
- 01 -> per_channel
- 10 -> per element
- 11 -> reserved
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
Dilate_CONV: (OP_CODE[4:0] = ‘h3) Dilate_CONV operation
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: Dilate_CONV (14’b 000000010_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {CLIP_MIN[15:0], CLIP_MAX[15:0]} [3 AddrSpace +255 + 5 max(32, AddrSpace): 3 AddrSpace+224+ 5 max(32, AddrSpace)]
- {K_NUM[11:0], K_LINE_STRIDE[19:0]} [3 AddrSpace +223 + 5 max(32, AddrSpace): 3 AddrSpace+192+ 5 max(32, AddrSpace)]
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [3 AddrSpace +191 + 5 max(32, AddrSpace): 3 AddrSpace+160+ 5 max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [3 AddrSpace +159 + 5 max(32, AddrSpace): 3 AddrSpace+128+ 5 max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [3 AddrSpace +127 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 5 max(32, AddrSpace)]
- {SCALE_O_ADDR} [3 AddrSpace +95 + 5 max(32, AddrSpace): 3 AddrSpace+96+ 4 max(32, AddrSpace)]
- {SHIFT_ADDR} [3 AddrSpace +95 + 4 max(32, AddrSpace): 3 AddrSpace+96+ 3 max(32, AddrSpace)]
- {Mul_ADDR} [3 AddrSpace +95 + 3 max(32, AddrSpace): 3 AddrSpace+96+ 2 max(32, AddrSpace)]
- {BIAS_ADDR} [3 AddrSpace +95 + 2 max(32, AddrSpace): 3 AddrSpace+96+ max(32, AddrSpace)]
- {Padding Address} [3 AddrSpace +95 + max(32, AddrSpace): 3 AddrSpace+96]
- Padding Mode [3 AddrSpace +95: 3 AddrSpace+64]
- Data Mode [3 AddrSpace +63: 3 AddrSpace]
- Destination Address [3 AddrSpace -1: 2 AddrSpace]
- Kernel Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- Data Mode: {Dialte_rate[6:0], Data_format[1:0], scale_mode[1:0], shift_mode[1:0], mul_mode[1:0], bias_mode[1:0], scale_unit[3:0], mul_unit[3:0], bias_unit[3:0], result_unit[3:0], w_unit[3:0], fm_unit[3:0]}
- scale_mode/shift_mode/mul_mode/bias_mode:
- 00 -> IMM mode/Per layer.
- 01 -> per_channel
- 10 -> per element
- 11 -> reserved
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
CONV3D OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CONV3D (14’b 000000010_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
TRANS_CONV3D OP_CODE[4:0] = ‘h5) Transpose_Conv3d operation
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: TRANS_CONV3D (14’b 000000010_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
CONV1D OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CONV1D (14’b 000000010_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
UDEF_CONV: (OP_CODE[4:0] = ‘h7)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: UDEF_CONV (14’b 000000010_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Pooling Instructions
The instructions in this section include the MAX/MIN/AVERAGE … Polling Instructions.
OP_CODE[13:5] = 9’b100
MAX_POOL: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD OP_CODE: MAX_POOL (14’b 000000100_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [2* AddrSpace +159 + max(32, AddrSpace): 2AddrSpace+128+ max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [2 AddrSpace +127 + max(32, AddrSpace): 2AddrSpace+96+ max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [2 AddrSpace +95 + max(32, AddrSpace): 2AddrSpace+64+ max(32, AddrSpace)]
- {Padding Address} [2 AddrSpace +63 + max(32, AddrSpace): 2AddrSpace+64]
- Padding Mode [2 AddrSpace +63: 2AddrSpace+32]
- Data Mode [2 AddrSpace +31: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
- Data Mode: {Data_format[1:0], fm_unit[3:0]}
MIN_POOL: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MIN_POOL (14’b 000000100_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [2* AddrSpace +159 + max(32, AddrSpace): 2AddrSpace+128+ max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [2 AddrSpace +127 + max(32, AddrSpace): 2AddrSpace+96+ max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [2 AddrSpace +95 + max(32, AddrSpace): 2AddrSpace+64+ max(32, AddrSpace)]
- {Padding Address} [2 AddrSpace +63 + max(32, AddrSpace): 2AddrSpace+64]
- Padding Mode [2 AddrSpace +63: 2AddrSpace+32]
- Data Mode [2 AddrSpace +31: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
- Data Mode: {Data_format[1:0], fm_unit[3:0]}
AVRG_POOL: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: AVRG_POOL (14’b 000000100_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [2* AddrSpace +159 + max(32, AddrSpace): 2AddrSpace+128+ max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [2 AddrSpace +127 + max(32, AddrSpace): 2AddrSpace+96+ max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [2 AddrSpace +95 + max(32, AddrSpace): 2AddrSpace+64+ max(32, AddrSpace)]
- {Padding Address} [2 AddrSpace +63 + max(32, AddrSpace): 2AddrSpace+64]
- Padding Mode [2 AddrSpace +63: 2AddrSpace+32]
- Data Mode [2 AddrSpace +31: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
- Data Mode: {Data_format[1:0], fm_unit[3:0]}
MEDIAN_POOL: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MEDIAN_POOL (14’b 000000100_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [2* AddrSpace +159 + max(32, AddrSpace): 2AddrSpace+128+ max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [2 AddrSpace +127 + max(32, AddrSpace): 2AddrSpace+96+ max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [2 AddrSpace +95 + max(32, AddrSpace): 2AddrSpace+64+ max(32, AddrSpace)]
- {Padding Address} [2 AddrSpace +63 + max(32, AddrSpace): 2AddrSpace+64]
- Padding Mode [2 AddrSpace +63: 2AddrSpace+32]
- Data Mode [2 AddrSpace +31: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
- Data Mode: {Data_format[1:0], fm_unit[3:0]}
ROI_POOL: (OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ROI_POOL (14’b 000000100_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {K_W[3:0], K_H[3:0], FM_W[11:0], FM_H[11:0]} [2* AddrSpace +159 + max(32, AddrSpace): 2AddrSpace+128+ max(32, AddrSpace)]
- {FM_C[11:0], FM_LINE_STRIDE[15:0]} [2 AddrSpace +127 + max(32, AddrSpace): 2AddrSpace+96+ max(32, AddrSpace)]
- {FM_surface_stride[31:0]} [2 AddrSpace +95 + max(32, AddrSpace): 2AddrSpace+64+ max(32, AddrSpace)]
- {Padding Address} [2 AddrSpace +63 + max(32, AddrSpace): 2AddrSpace+64]
- Padding Mode [2 AddrSpace +63: 2AddrSpace+32]
- Data Mode [2 AddrSpace +31: 2AddrSpace]
- Destination Address [2 AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Padding Mode: {padding_mode[1:0], V_stride[3:0], H_stride[3:0], R_pad[3:0], L_pad[3:0], B_pad[3:0], T_pad[3:0]}
- padding_mode[1:0]: 00-> per layer; 01 -> per channel; others -> reserved
- Data Mode: {O_W[11:0], O_H[11:0], Data_format[1:0], fm_unit[3:0]}
- The operation is MAX in each section
POOL3D: (OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: POOL3D (14’b 000000100_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
POOL1D: (OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: POOL1D (14’b 000000100_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
ADAPTIVV_POOL1D: (OP_CODE[4:0] = ‘h7)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ADAPTIVV_POOL1D (14’b 000000100_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
ADAPTIVV_POOL2D: (OP_CODE[4:0] = ‘h8)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ADAPTIVV_POOL2D (14’b 000000100_01000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
ADAPTIVV_POOL3D: (OP_CODE[4:0] = ‘h9)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ADAPTIVV_POOL3D (14’b 000000100_01001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
UDEF_POOL: (OP_CODE[4:0] = ‘ha)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: UDEF_POOL (14’b 000000100_01010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Norm Instructions
The instructions in this section include the BatchNorm/InstanceNorm/LayerNorm … Norm Instructions.
OP_CODE[13:5] = 9’b101
BATCH_NORM: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: BATCH_NORM (14’b 000000101_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0],Batch_Num[11:0]} [6AddrSpace +63,6AddrSpace +32]
- Data Mode [6AddrSpace +31: 6AddrSpace]
- Var Address [6AddrSpace-1: 5AddrSpace]
- Mean Address [5AddrSpace-1: 4AddrSpace -1]
- Destination Address [4AddrSpace -1: 3AddrSpace]
- Bias Address [3AddrSpace -1,2AddrSpace]
- Weight Address [2AddrSpace -1:AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {I_W[11:0], I_H[11:0],Data_format[1:0],fm_unit[3:0]}
- fm_unit[3:0] is for FM,Weight,Bias,Var,Mean and Destination data unit;
- var data length = FC = mean data length = bias data length = weight data length
INSTANCE_NORM: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: INSTANCE_NORM (14’b 000000101_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0]} [4AddrSpace +63,4AddrSpace +32]
- Data Mode [4AddrSpace +31: 4AddrSpace]
- Destination Address [4AddrSpace -1: 3AddrSpace]
- Bias Address [3AddrSpace -1,2AddrSpace]
- Weight Address [2AddrSpace -1:AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {I_W[11:0], I_H[11:0],Data_format[1:0],fm_unit[3:0]}
- fm_unit[3:0] is for FM,Weight,Bias,Var,Mean and Destination data unit;
- FC = Bias data length = Weight data length
LAYER_NORM: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LAYER_NORM (14’b 000000101_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0]} [4AddrSpace +63,4AddrSpace +32]
- Data Mode [4AddrSpace +31: 4AddrSpace]
- Destination Address [4AddrSpace -1: 3AddrSpace]
- Bias Address [3AddrSpace -1,2AddrSpace]
- Weight Address [2AddrSpace -1:AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {I_W[11:0], I_H[11:0],Data_format[1:0],fm_unit[3:0]}
- fm_unit[3:0] is for FM,Weight,Bias,Var,Mean and Destination data unit;
- FC = Bias data length = Weight data length
GROUP_NORM: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: GROUP_NORM (14’b 000000101_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- {FC[11:0],Group_Num[11:0]} [4AddrSpace +63,4AddrSpace +32]
- Data Mode [4AddrSpace +31: 4AddrSpace]
- Destination Address [4AddrSpace -1: 3AddrSpace]
- Bias Address [3AddrSpace -1,2AddrSpace]
- Weight Address [2AddrSpace -1:AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {I_W[11:0], I_H[11:0],Data_format[1:0],src_unit[3:0]}
- FC = Bias data length = Weight data length
LRN_NORM: (OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LRN_NORM (14’b 000000101_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
LP_NORM: (OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LP_NORM (14’b 000000101_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
L2_NORM: (OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: L2_NORM (14’b 000000101_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- USER DEFINE
Encoding Instructions
The instructions in this section include encoding functions
OP_CODE[13:5] = 9’b111
EMBEDDING(OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: EMBEDDING (14’b 000000111_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
ONE_HOT(OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ONE_HOT (14’b 000000111_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Recurrent Instructions
The instructions in this section include Recurrent functions
OP_CODE[13:5] = 9’b1000
LSTM(OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LSTM (14’b 000001000_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
RNN_CELL(OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RNN_CELL (14’b 000001000_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
RNN(OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RNN (14’b 000001000_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
LSTM_CELL(OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LSTM_CELL (14’b 000001000_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
GRU_CELL(OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: GRU_CELL (14’b 000001000_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
GRU(OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: GRU (14’b 000001000_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Dropout Instructions
The instructions in this section include Dropout functions
OP_CODE[13:5] = 9’b1001
DROPOUT: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: DROPOUT (14’b 00000_1001_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- operation length [2AddrSpace +95,2AddrSpace +64]
- Ratio [2AddrSpace +63: 2AddrSpace+32]
- Data Mode [2AddrSpace +31: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode: {src_unit[3:0],ratio_unit[3:0]}
- ratio_unit[3:0] is for ratio ,only support float
LABEL_SMOOTH: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LABEL_SMOOTH (14’b 00000_1001_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Vision Instructions
The instructions in this section include shuffle functions
OP_CODE[13:5] = 9’b1010
PIXEL_SHUFFLE: (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: PIXEL_SHUFFLE (14’b 00000_1010_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Data Mode [2AddrSpace +63: 2AddrSpace+32]
- {FH[11:0],FW[11:0],Scale[4:0]} [2AddrSpace+31: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode{src_unit[3:0],FC[11:0],Data_Format[1:0]}
PIXEL_UNSHUFFLE: (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: PIXEL_UNSHUFFLE (14’b 00000_1010_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction)
- Data Mode [2AddrSpace +63: 2AddrSpace+32]
- {FH[11:0],FW[11:0],Scale[4:0]} [2AddrSpace+31: 2AddrSpace]
- Destination Address [2AddrSpace -1: AddrSpace]
- FM Address [AddrSpace -1:0]
Note:
- Data Mode{src_unit[3:0],FC[11:0],Data_Format[1:0]}
GRID_SAMPLE: (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: GRID_SAMPLE (14’b 00000_1010_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER_DEFINE
AFFINE_GRID: (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: AFFINE_GRID (14’b 00000_1010_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER_DEFINE
Loss Instructions
The instructions in this section include loss functions
OP_CODE[13:5] = 9’b1011
CROSS_ENTROPY(OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CROSS_ENTROPY (14’b 00000_1011_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
MSE_LOSS(OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MSE_LOSS (14’b 00000_1011_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
L1_LOSS(OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: L1_LOSS (14’b 00000_1011_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
LOG_LOSS(OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: LOG_LOSS (14’b 00000_1011_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
SMOOTH_L1_LOSS(OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SMOOTH_L1_LOSS (14’b 00000_1011_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
KLDIV_LOSS (OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: KLDIV_LOSS (14’b 00000_1011_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
NLL_LOSS (OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: NLL_LOSS (14’b 00000_1011_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
SPARSE_CROSS_ENTROPY_LOSS (OP_CODE[4:0] = ‘h7)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SPARSE_CROSS_ENTROPY_LOSS (14’b 00000_1011_00111)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
SOFT_MARGIN_LOSS (OP_CODE[4:0] = ‘h8)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SOFT_MARGIN_LOSS (14’b 00000_1011_01000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Model Accuracy Instructions
The instructions in this section include model accuracy functions
OP_CODE[13:5] = 9’b1100
ACCURACY (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ACCURACY (14’b 00000_1100_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
AUC (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: AUC (14’b 00000_1100_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
Optimizer Instructions
The instructions in this section include optimizer functions
OP_CODE[13:5] = 9’b1101
SGD (OP_CODE[4:0] = ‘h0)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: SGD (14’b 00000_1101_00000)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
MOMENTUM (OP_CODE[4:0] = ‘h1)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: MOMENTUM (14’b 00000_1101_00001)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
ADA_GRAD (OP_CODE[4:0] = ‘h2)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ADA_GRAD (14’b 00000_1101_00010)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
ADA_DELTA (OP_CODE[4:0] = ‘h3)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ADA_DELTA (14’b 00000_1101_00011)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
RMS_PROP (OP_CODE[4:0] = ‘h4)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: RMS_PROP (14’b 00000_1101_00100)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
CENTERED_RMSPROP (OP_CODE[4:0] = ‘h5)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: CENTERED_RMSPROP (14’b 00000_1101_00101)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
ADAM (OP_CODE[4:0] = ‘h6)
Instruction format:
- OP_SECTION: AI SECTION (6’b0)
- AS: 2’b00-> 16bit; 2’b01 -> 32bit; 2’b10 -> 64bit; 2’b11 -> RSVD
- OP_CODE: ADAM (14’b 00000_1101_00110)
- SYNC_CTRL: refer to SYNC CTRL format
- OPERAND DESCRIPTOR: The address of Operand Table
- OPERAND TABLE: (AddrSpace can be 16/32/64 depends on AS field in the instruction) USER DEFINE
3. ZHOUYI Domain Instruction (DID = 1)
DID is set to 8-bit 1 for ZHOUYI instruction as shown below.
Bit 135:8 | Bit 7:0 |
---|---|
ZY Native Instructions | 8‘b1 |
Note: refer to ZHOUYI released TRM for the detailed information of ZHOUYI ISA.