AT24C128 EEPROM数据手册中文翻译

1 features •low-voltage and standard-voltage operation –2.7 (vcc = 2.7v to 5.5v) –1.8 (vcc = 1.8v to 3.6v) •internally organized 16,384 x 8 and 32,768 x 8 •2-wire serial interface •schmitt trigger, filtered inputs for noise suppression •bidirectional data transfer protocol •1 mhz (5v), 400 khz (2.7v, 2.5v) and 100 khz (1.8v) compatibility •write protect pin for hardware and software data protection •64-byte page write mode (partial page writes allowed) •self-timed write cycle (5 ms typical) •high reliability –endurance: one million write cycles –data retention: 40 years •automotive grade, extended temperature and lead-free devices available • 8-lead jedec pdip, 8-lead jedec and eiaj soic, 8-lead map, 8-lead tssop and 8-ball dbga2tm packages description the at24c128/256 provides
1、特点·低压和标准电压操作-2.7(VCC=2.7v至5.5v)-1.8(VCC=1.8v至3.6v)·内部组织16,384x8和32,768x8·2线串行接口·施密特触发器，滤波输入噪声抑制·双向数据传输协议·1MHz(5v)、400kHz(2.7v、2.5v)和100kHz（1。兼容·写保护引脚用于硬件和软件数据保护·64字节页面写入模式(允许部分页面写入）·自动定时写入周期(5ms典型)·高可靠性-持久性：100万个写入周期-数据保留：40年·汽车等级，扩展温度和无铅设备可用·8引线JedecPDIP，8引线Jedec和eiajSoic，8引线地图，8引线TSSOP和8球dbga2tm包描述at24c128/256提供

3 at24c128/256 0670k–seepr–7/03 pin description serial clock (scl): the scl input is used to positive edge clock data into eacheeprom device and negative edge clock data out of each device. serial data (sda): the sda pin is bidirectional for serial data transfer. this pin is open-drain driven and may be wire-ored with any number of other open-drain or open collectordevices.
3、at24c128/2560670k-seepr-7/03引脚描述串行时钟(SCL)：SCL输入用于将正边缘时钟数据输入Eacheeprom设备，并将负边缘时钟数据从每个设备中输出。 串行数据(SDA)：SDA引脚是双向的，用于串行数据传输。 这个引脚是开路漏驱动的，可以用任何数量的其他开路漏或开路收集设备进行线芯。

device/page addresses (a1, a0): the a1 and a0 pins are device address inputs thatare hardwired or left not connected for hardware compatibility with at24c32/64. when thepins are hardwired, as many as four 128k/256k devices may be addressed on a single bussystem (device addressing is discussed in detail under the device addressing section). whenthe pins are not hardwired, the default a1 and a0 are zero.
设备/页面地址(A1，A0)：A1和A0引脚是设备地址输入，它们是硬连线的，或者没有连接，以便与AT24C32/64进行硬件兼容。 当引脚是硬连线时，多达4个128k/256k设备可以在单个总线系统上寻址（设备寻址在设备寻址部分下详细讨论）。 当引脚不是硬连线时，默认的A1和A0为零。

write protect (wp): the write protect input, when tied to gnd, allows normal write oper-ations. when wp is tied high to vcc, all write operations to the memory are inhibited.