从SMBIOS中获取硬件信息

      回家过国庆,闲来无事。今天就写点之前做的一些东西吧。我们需要获取什么硬件信息,这个主要和你要获取的设备信息的详细程度有关。对于像系统的设备管理器,如果只是想得到想设备管理器的信息,你完全可以参考ddk,或者从网上早点过于SetDi×××这里函数。使用这类函数,可以让你做出来的东西和设备管理器一样。代码部分,在这后的下载中提供。对于硬件相关信息,有很多方法。就说说cpu名称的获取吧。这个至少有5中方法,最简单的就是通过查询注册表了,其他的方法有使用CPUID指令,WMI(这种方法也很简单),还有通过smbios,还有你可以通过dxdiag接口(这个需要在安装了dx9之上的系统上),当然除了这几种方法外肯定还有其他的方式来获取。今天就说说smbios吧。

     smbios,这个是一个规范。如果用过everest的人一定有看到过dmi信息。这个就是通过smbios获取到的。我最感兴趣的是,通过这个可以知道你的内存型号,是ddr,ddr3等类型。通过这个可以获取到cpu,bios,board,slot等信息,获取的种类很多,具体的要看smbios规范了。机器在启动之初,设备会将相关写入dmi数据库中。那些个oem操作系统貌似就是通过修改这个进行的。

    其实ms的wmi中获取相关信息很大一部分是通过获取这部分数据了。就说传感器信息吧,原本以为是可以通过这种方式获取的到的,smbiso协议中是有提到的,ms,也原来以为硬件厂家会往其中写入数据,但是协议总归是协议,很多都没有按规定将传感器信息写到dmi中。所以你如果想通wmi方式获取cpu温度等信息,那你就白搭了。这个需要通过驱动进行获取cpu温度等信息。

   有 点扯远了,smbios,会在0xf000到0xffff中写入smbios头,这个头里面有具体的dmi信息位置,表的大小,个数。当然这些说的地址都是物理地址。在2k系统和一部分xp中,我们是可以通过ZwOpenSection将物理内存进行映射读取信息的。但是遗憾的是在2k3中已经不行了,返回给是access_denied。ms主要是出于安全上考虑进行的。不过ms将这部分信息写进了注册表中(controlset/services/mssmbios/data),但是我们最好还是不要直接读这部分信息,因为很简单,不知道ms之后的系统会将这部分信息写道那个注册表项中。ms在屏蔽了直接读取物理内存之后,给我们提供了使用wmi方式获取dmi表信息,在xp之后系统还可以进行。在2k3上,提供了相关api进行获取,这个api还真是忘记了。

    我们得到了dmi表信息块之后,后面的事情就简单了。只要按照协议进行解析就行了在每个类开始是一个tpye,这个使用来表示是bios信息,还cpu信息等。这里简单的说了说smbios。这篇文章完全是靠仅存的记忆,所以写的不完全,也难免有错误。具体的还是看smbios规范,还是这边标准吗。可以在这里下载smbios规范。写的不足的地方,敬请指出。

 

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System Management BIOS (SMBIOS) Reference 6 Specification 7 Supersedes: 3.1.1 8 Document Class: Normative 9 Document Status: Published 10 Document Language: en-US 11System Management BIOS (SMBIOS) Reference Specification DSP0134 2 Published Version 3.2.0 12 Copyright Notice 13 Copyright © 2000, 2002, 2004–2016 Distributed Management Task Force, Inc. (DMTF). All rights 14 reserved. 15 DMTF is a not-for-profit association of industry members dedicated to promoting enterprise and systems 16 management and interoperability. Members and non-members may reproduce DMTF specifications and 17 documents, provided that correct attribution is given. As DMTF specifications may be revised from time to 18 time, the particular version and release date should always be noted. 19 Implementation of certain elements of this standard or proposed standard may be subject to third party 20 patent rights, including provisional patent rights (herein "patent rights"). DMTF makes no representations 21 to users of the standard as to the existence of such rights, and is not responsible to recognize, disclose, 22 or identify any or all such third party patent right, owners or claimants, nor for any incomplete or 23 inaccurate identification or disclosure of such rights, owners or claimants. DMTF shall have no liability to 24 any party, in any manner or circumstance, under any legal theory whatsoever, for failure to recognize, 25 disclose, or identify any such third party patent rights, or for such party’s reliance on the standard or 26 incorporation thereof in its product, protocols or testing procedures. DMTF shall have no liability to any 27 party implementing such standard, whether such implementation is foreseeable or not, nor to any patent 28 owner or claimant, and shall have no liability or responsibility for costs or losses incurred if a standard is 29 withdrawn or modified after publication, and shall be indemnified and held harmless by any party 30 implementing the standard from any and all claims of infringement by a patent owner for such 31 implementations. 32 For information about patents held by third-parties which have notified the DMTF that, in their opinion, 33 such patent may relate to or impact implementations of DMTF standards, visit 34 http://www.dmtf.org/about/policies/disclosures.php. 35 This document’s normative language is English. Translation into other languages is permitted.DSP0134 System Management BIOS (SMBIOS) Reference Specification Version 3.2.0 Published 3 36 CONTENTS 37 Foreword ....................................................................................................................................................... 9 38 Introduction.................................................................................................................................................. 10 39 Document conventions........................................................................................................................ 10 40 Typographical conventions ....................................................................................................... 10 41 Document version number conventions ................................................................................... 10 42 1 Scope .................................................................................................................................................. 13 43 1.1 Supported processor architectures........................................................................................... 13 44 2 Normative references .......................................................................................................................... 13 45 3 Terms and definitions .......................................................................................................................... 15 46 4 Symbols and abbreviated terms.......................................................................................................... 15 47 5 Accessing SMBIOS information .......................................................................................................... 21 48 5.1 General ..................................................................................................................................... 21 49 5.2 Table convention....................................................................................................................... 21 50 5.2.1 SMBIOS 2.1 (32-bit) Entry Point.................................................................................. 22 51 5.2.2 SMBIOS 3.0 (64-bit) Entry Point.................................................................................. 23 52 6 SMBIOS structures.............................................................................................................................. 24 53 6.1 Structure standards................................................................................................................... 24 54 6.1.1 Structure evolution and usage guidelines.................................................................... 25 55 6.1.2 Structure header format............................................................................................... 26 56 6.1.3 Text strings .................................................................................................................. 26 57 6.2 Required structures and data ................................................................................................... 27 58 6.3 SMBIOS fields and CIM MOF properties.................................................................................. 28 59 7 Structure definitions............................................................................................................................. 29 60 7.1 BIOS Information (Type 0)........................................................................................................ 29 61 7.1.1 BIOS Characteristics.................................................................................................... 31 62 7.1.2 BIOS Characteristics Extension Bytes......................................................................... 32 63 7.2 System Information (Type 1) .................................................................................................... 33 64 7.2.1 System — UUID........................................................................................................... 34 65 7.2.2 System — Wake-up Type............................................................................................ 35 66 7.3 Baseboard (or Module) Information (Type 2) ........................................................................... 35 67 7.3.1 Baseboard — feature flags .......................................................................................... 36 68 7.3.2 Baseboard — Board Type ........................................................................................... 37 69 7.4 System Enclosure or Chassis (Type 3) .................................................................................... 37 70 7.4.1 System Enclosure or Chassis Types........................................................................... 39 71 7.4.2 System Enclosure or Chassis States........................................................................... 40 72 7.4.3 System Enclosure or Chassis Security Status ............................................................ 41 73 7.4.4 System Enclosure or Chassis — Contained Elements................................................ 41 74 7.5 Processor Information (Type 4) ................................................................................................ 42 75 7.5.1 Processor Information — Processor Type................................................................... 45 76 7.5.2 Processor Information — Processor Family ................................................................ 46 77 7.5.3 Processor ID field format ............................................................................................. 52 78 7.5.4 Processor Information — Voltage................................................................................ 52 79 7.5.5 Processor Information — Processor Upgrade............................................................. 53 80 7.5.6 Processor Information — Core Count.......................................................................... 55 81 7.5.7 Processor Information — Core Enabled...................................................................... 55 82 7.5.8 Processor Information — Thread Count...................................................................... 56 83 7.5.9 Processor Characteristics............................................................................................ 56 84 7.6 Memory Controller Information (Type 5, Obsolete) .................................................................. 57 85 7.6.1 Memory Controller Error Detecting Method................................................................. 58 86 7.6.2 Memory Controller Error Correcting Capability............................................................ 58 87 7.6.3 Memory Controller Information — Interleave Support................................................. 58System Management BIOS (SMBIOS) Reference Specification DSP0134 4 Published Version 3.2.0 88 7.6.4 Memory Controller Information — Memory Speeds .................................................... 59 89 7.7 Memory Module Information (Type 6, Obsolete) ...................................................................... 59 90 7.7.1 Memory Module Information — Memory Types .......................................................... 60 91 7.7.2 Memory Module Information — Memory Size ............................................................. 60 92 7.7.3 Memory subsystem example ....................................................................................... 61 93 7.8 Cache Information (Type 7) ...................................................................................................... 63 94 7.8.1 Cache Information — Maximum Cache Size and Installed Size ................................. 65 95 7.8.2 Cache Information — SRAM Type .............................................................................. 65 96 7.8.3 Cache Information — Error Correction Type ............................................................... 66 97 7.8.4 Cache Information — System Cache Type ................................................................. 66 98 7.8.5 Cache Information — Associativity.............................................................................. 66 99 7.9 Port Connector Information (Type 8) ........................................................................................ 67 100 7.9.1 Port Information example............................................................................................. 68 101 7.9.2 Port Information — Connector Types .......................................................................... 68 102 7.9.3 Port Types.................................................................................................................... 69 103 7.10 System Slots (Type 9)............................................................................................................... 70 104 7.10.1 System Slots — Slot Type ........................................................................................... 71 105 7.10.2 System Slots — Slot Data Bus Width.......................................................................... 73 106 7.10.3 System Slots — Current Usage................................................................................... 74 107 7.10.4 System Slots — Slot Length ........................................................................................ 74 108 7.10.5 System Slots — Slot ID ............................................................................................... 74 109 7.10.6 Slot Characteristics 1................................................................................................... 75 110 7.10.7 Slot Characteristics 2................................................................................................... 75 111 7.10.8 Segment Group Number, Bus Number, Device/Func
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