ASRC和SSRC

With SSRC there is only one clock. Or to be more accurate the output clock is derived from the input clock synchronously: usually in a rational manner, i.e. twice as often as the input or 320 times for each 147 times on the input. The math to derive the output samples is fairly simple in principle, e.g. for 44.1 to 96 put in 319 zeros between each input sample, filter the stream at 22.05 and output every 147 sample. If you are careful you can save a lot of math by not calculating the samples you don't need and skip over all of the multiplies by zero...

With ASRC there are two independent clocks, the input and the output. In a theoretical sense you upsample the input to a high rate and then use the output clock to pick samples at the right time perhaps using interpolation between the samples when the clocks aren't perfectly aligned (and they will rarely be aligned.) ASRC has the advantage that the output clock can be very controlled (low jitter) and the DAC can be optimized for that rate. It has the "feature" that any input jitter is encoded in the data. The results of this can be either better or worse than SSRC depending on the input jitter and the jitter sensitivity of the DAC proper...

A "regular" sample rate converter is synchronous and converts between two fixed sample rates.  For example, converting from 8 kHz to 32 kHz.  Synchronous conversion is most efficient when the rates are related by small integers.  Going from 8 to 32 kHz is a fixed increase of 4x.  Converting an audio file from 44.1 kHz to a fixed output rate of 48 kHz can be accomplished using synchronous conversion but the factors aren't that nice any more.  You need a ratio of 160/147.

 There are many applications where you have multiple independent clocks in the system and need to convert everything to a fixed rate.  Consider a USB audio device that receives data from the PC and then converts it to analog.  The PC is sending audio based on its own clock rate while the D/A converter in the USB device has a separate clock.  These clocks are distinct and slowly vary over time.  For this application, you need an asynchronous sample rate converter.  Asynchronous converters can handle slowly varying clocks rates.  (The USB spec provides for several different ways to synchronous clocks. Using a sample rate converter is just one way of doing it.  There are other methods that don't require an asynchronous sample rate converter.)  Mixing independent digital inputs each with their own clock also requires an asynchronous sample rate converter.  Even if both inputs are nominally at 44.1 kHz, since they have separately clocks they won't both be at exactly the same rate.  One may be at 44100 while the other at 44100.02.

Getting back to converting from 44.1 to 48 kHz, this is actually easier using an asynchronous sample rate converter.  The ratio of 160/147 is no problem.

 

SSRC: 只有一个clock，输出clock是从输入clock同步分出来的：输出是输入的两倍，或者147次输入时，有320次输出。

例如，从44.1k转到96k，在每个采样之间插入319个0，在22.05滤波，输出每147个采样。

ASRC：有两个独立的clocks。将输入采样到很高的频率，然后用输出clock去选择合适的采样。

输出的clock可以被严格的控制。

通常的采样率转换是同步的，用于两个固定采样率之间的转换，例如从8khz转换到32khz。当频率与小整数相关时，同步转换效率最高，从8khz到32khz是固定的提高4倍。从44.1khz转换到48khz也是可以做到的，但是转换率就需要160/147.

有时候一个系统里面需要多个独立的时钟，把所有的频率都转换成一个固定频率。例如一个USB声卡从PC接收数据，并将其转换成模拟信号，PC根据自己的时钟发送数据，D/A也有自己的时钟。这两个时钟是分开的，而且会随着时间缓慢变化，这种情况下，就需要异步采样率转换。异步转换可以处理缓慢变化的时钟信号(USB spec提供了多种同步时钟的方法，使用采样率转换只是其中一种方法，有其他方法不需要异步采样率转换)。将具有独立时钟的数字信号混合也需要异步采样率转换，即使两个输入都是44.1khz，但是由于他们有不同的时钟，采样率可能有细微的差别，可能一个是44100，另一个是44100.02.

如果用ASRC，则从44.1khz转换到48khz就会很简单