Byte Offset | Bits 31-24 | Bits 23-16 | Bits 15-8 | Bits 7-0 |
00h | Device ID (设备识别) | Vendor ID (供应商识别) | ||
04h | Status (状态) | Command (命令) | ||
08h | Class Code(分类代码) | Revision ID (修订识别) | ||
0Ch | Bist (内含自测试) | Header Type (头标类型) | Latency Timer (延时计数) | Cache Line Size (Cache大小) |
10h | Base Address 0 -- Base Address of Cmd-Block Regs, ATA Channel X (命令寄存器基址, ATA通道X) | |||
14h | Base Address 1 -- Base Address of Control Regs, ATA Channel X (控制寄存器基址,ATA通道X) | |||
18h | Base Address 2 -- Base Address of Cmd-Block Regs, ATA Channel Y (命令寄存器基址,ATA通道Y) | |||
1Ch | Base Address 3 -- Base Address of Control Regs, ATA Channel Y (控制寄存器基址,ATA通道Y) | |||
20h | Base Address 4 -- Base Address of ATA Bus Master Registers (ATA总线控制器寄存器基址) | |||
24h | Base Address 5 -- Vendor Specific | |||
28h | PCI | |||
2Ch | SubSystem ID(子系统识别) | SubSystem Vendor ID(供应商子系统识别) | ||
30h | Expansion Rom Base Address (扩展Rom基址) | |||
34h | PCI | |||
38h | PCI | |||
3Ch | Max_Lat | Min_Gnt | Interrupt Pin (中断引脚) | Interrupt Line (中断干线) |