3.17.1 ARM Options
These `-m' options are defined for Advanced RISC Machines (ARM) architectures:
-
Generate code for the specified ABI. Permissible values are: `
apcs-gnu', `
atpcs', `
aapcs', `
aapcs-linux' and `
iwmmxt'.
-
Generate a stack frame that is compliant with the ARM Procedure Call Standard for all functions, even if this is not strictly necessary for correct execution of the code. Specifying
-fomit-frame-pointer with this option will cause the stack frames not to be generated for leaf functions. The default is
-mno-apcs-frame.
-
This is a synonym for
-mapcs-frame.
-
Generate code which supports calling between the ARM and Thumb instruction sets. Without this option the two instruction sets cannot be reliably used inside one program. The default is
-mno-thumb-interwork, since slightly larger code is generated when
-mthumb-interwork is specified.
-
Prevent the reordering of instructions in the function prolog, or the merging of those instruction with the instructions in the function's body. This means that all functions will start with a recognizable set of instructions (or in fact one of a choice from a small set of different function prologues), and this information can be used to locate the start if functions inside an executable piece of code. The default is
-msched-prolog.
-
Specifies which floating-point ABI to use. Permissible values are: `
soft', `
softfp' and `
hard'.
Specifying `soft' causes GCC to generate output containing library calls for floating-point operations. `softfp' allows the generation of code using hardware floating-point instructions, but still uses the soft-float calling conventions. `hard' allows generation of floating-point instructions and uses FPU-specific calling conventions.
The default depends on the specific target configuration. Note that the hard-float and soft-float ABIs are not link-compatible; you must compile your entire program with the same ABI, and link with a compatible set of libraries.
-
Generate code for a processor running in little-endian mode. This is the default for all standard configurations.
-
Generate code for a processor running in big-endian mode; the default is to compile code for a little-endian processor.
-
This option only applies when generating code for big-endian processors. Generate code for a little-endian word order but a big-endian byte order. That is, a byte order of the form `
32107654'. Note: this option should only be used if you require compatibility with code for big-endian ARM processors generated by versions of the compiler prior to 2.8.
- This specifies the name of the target ARM processor. GCC uses this name to determine what kind of instructions it can emit when generating assembly code. Permissible names are: ` arm2', `
-mabi=
name
-mapcs-frame
-mapcs
-mthumb-interwork
-mno-sched-prolog
-mfloat-abi=
name
-mlittle-endian
-mbig-endian
-mwords-little-endian
-mcpu=
name