light-weight sync 和 heavy-weight sync

Reprint:http://www.ibm.com/developerworks/systems/articles/powerpc.html

The barrier created by the sync instruction is more comprehensive in that it orders all storage accesses regardless of class. There are two versions of the sync instruction.

• The first form is heavy-weight sync, or commonly just referred to as sync. This form is often needed by adapter device drivers, for ordering system memory accesses made by a driver critical section with accesses made to its I/O adapter. Executing sync ensures that all instructions preceding the sync instruction have completed before the sync instruction completes, and that no subsequent instructions are initiated until after the sync instruction completes. This does not mean that the previous storage accesses have completed before the sync instruction completes. A store access has not beenperformed until a subsequent load is guaranteed to see the results of the store. Similarly, a load is performed only when the value to be returned can no longer be altered by a store.

  The memory barrier created by the sync instruction provides "cumulative" ordering. This means that after a program executing on processor P0 observes accesses performed by a program executing on processor P1 and then executes async instruction, subsequent storage accesses performed by the program executing on processor P0 will be performed with respect to other processors after the accesses it observed to have been performed by the program executing on processor P1. For example, a program executing on processor P3 will not see a sequence of storage accesses that would conflict with the order of the sequence observed and performed by the program executing on processor P0.

  A heavy-weight sync occurs within the AIX kernel's unlock services (for example, unlock_enable). Device drivers typically unlock_enable before leaving their interrupt handler, and the underlying heavy weight sync has guaranteed that storage accesses to device memory are made visible with respect to other processors correctly.

• The second form of the sync instruction is light-weight sync, or lwsync. This form is used to control ordering for storage accesses to system memory only. It does not create a memory barrier for accesses to device memory. This kind of syncoccurs within the kernel's unlock_mem services (for example, unlock_enable_mem). Software needing coordination between shared system memory access by different CPUs, without concern for related ordering of accesses to device memory, can make use of lwsync. An example later in the document shows an additional potential use for lwsync in device drivers.