基于STM32音响控制系统源代码（一）（音乐频谱显示）

最新推荐文章于 2024-07-26 23:22:34 发布

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最新推荐文章于 2024-07-26 23:22:34 发布

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文章标签：源代码 stm32 音乐频谱

本文链接：https://blog.csdn.net/zhanddkk/article/details/25424079

版权

本文介绍了基于STM32的音响控制系统，重点展示音乐频谱显示的功能。通过TFT.c、TFT.h、Task.c和main.c等关键代码，详细阐述了如何实现这一视觉效果。

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效果图：

TFT.c

#include "TFT.h"
U16 TFT_ChipID;
static void __FSMCConfig(void)
{
    FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
    FSMC_NORSRAMTimingInitTypeDef  p;

/*-- FSMC Configuration ------------------------------------------------------*/
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
    /* FSMC_Bank1_NORSRAM4 timing configuration */
    p.FSMC_AddressSetupTime = 1;
    p.FSMC_AddressHoldTime = 0;
    p.FSMC_DataSetupTime = 5;
    p.FSMC_BusTurnAroundDuration = 0;
    p.FSMC_CLKDivision = 0;
    p.FSMC_DataLatency = 0;
    p.FSMC_AccessMode = FSMC_AccessMode_B;

    /* FSMC_Bank1_NORSRAM4 configured as follows:
        - Data/Address MUX = Disable
        - Memory Type = SRAM
        - Data Width = 16bit
        - Write Operation = Enable
        - Extended Mode = Disable
        - Asynchronous Wait = Disable */
    FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4;
    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
    FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
    FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
    FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
    FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
    FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

    FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);  

    /* Enable FSMC_Bank1_NORSRAM4 */
    FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE);	
}
static void __GpioConfig(void)
{
    GPIO_InitTypeDef GPIO_InitStructure;
#ifndef FSMC_TFT
    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE|RCC_APB2Periph_GPIOD, ENABLE);
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
    GPIO_Init(TFT_DATA_PIN, &GPIO_InitStructure);
	
    GPIO_InitStructure.GPIO_Pin = TFT_CS|TFT_RS|TFT_WR|TFT_RD|TFT_RESET;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
    GPIO_Init(TFT_COTROL_PIN, &GPIO_InitStructure);
	
    GPIO_ResetBits(TFT_COTROL_PIN, TFT_RESET);
    GPIO_SetBits(TFT_COTROL_PIN, TFT_CS);
    GPIO_SetBits(TFT_COTROL_PIN, TFT_RS);
    GPIO_SetBits(TFT_COTROL_PIN, TFT_WR);
    GPIO_SetBits(TFT_COTROL_PIN, TFT_RD);
    GPIO_SetBits(TFT_COTROL_PIN, TFT_RESET);
#else
/*FSMC*/
    /* Enable GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */

    RCC_APB2PeriphClockCmd (RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
                            RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG |
                            RCC_APB2Periph_GPIOB |RCC_APB2Periph_AFIO, ENABLE);
    /* Set PG.15(REST), Out put*/											 
    GPIO_InitStructure.GPIO_Pin = TFT_RESET;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
    GPIO_Init(TFT_COTROL_PIN, &GPIO_InitStructure);
	
    GPIO_InitStructure.GPIO_Pin = TFT_LED;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_Init(GPIOB, &GPIO_InitStructure);
    /* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14),
    PD.10(D15), PD.14(D0), PD.15(D1) as alternate 
    function push pull */
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 |
                                  GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | 
                                  GPIO_Pin_15;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
    GPIO_Init(GPIOD, &GPIO_InitStructure);

    /* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10),
    PE.14(D11), PE.15(D12) as alternate function push pull */
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | 
                                  GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | 
                                  GPIO_Pin_15;
    GPIO_Init(GPIOE, &GPIO_InitStructure);

    /* Set PF.00(A0 (RS)) as alternate function push pull */
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
    GPIO_Init(GPIOF, &GPIO_InitStructure);

    /* Set PG.12(NE4 (LCD/CS)) as alternate function push pull - CE3(LCD /CS) */
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
    GPIO_Init(GPIOG, &GPIO_InitStructure);	
    GPIO_SetBits(TFT_COTROL_PIN, TFT_RESET);
#endif /*FSMC_TFT*/   
}
#ifndef FSMC_TFT
static void __DB_AS_InPut(void)
{
    GPIO_InitTypeDef GPIO_InitStructure;

    // DB15--0
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
    GPIO_Init(TFT_DATA_PIN, &GPIO_InitStructure);
}

static void __DB_AS_OutPut(void)
{
    GPIO_InitTypeDef GPIO_InitStructure;

    // DB15--0
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
    GPIO_Init(TFT_DATA_PIN, &GPIO_InitStructure);
}
#endif /*FSMC_TFT*/

static void __WriteReg(U32 tftReg,U32 tftRegValue)
{
#ifndef