2022.12.29 作业

zhang_c_x

已于 2022-12-29 20:48:22 修改

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文章标签：单片机 stm32 嵌入式硬件

于 2022-12-29 18:58:44 首次发布

本文链接：https://blog.csdn.net/zhang_c_x/article/details/128486385

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1、按键中断控制led亮灭

stm32mp1xx_rcc.h

#ifndef __STM32MP1XX_RCC_H__
#define __STM32MP1XX_RCC_H__ 

typedef struct {
	volatile unsigned int TZCR;     	// 0x000
	volatile unsigned int res1[2]; 		// 0x004-0x008
	volatile unsigned int OCENSETR;     // 0x00C
	volatile unsigned int OCENCLRR;  	// 0x010
	volatile unsigned int res2[1]; 		// 0x014
	volatile unsigned int HSICFGR; 		// 0x018
	volatile unsigned int CSICFGR; 		// 0x01C
	volatile unsigned int MPCKSELR; 	// 0x020
	volatile unsigned int ASSCKSELR; 	// 0x024
	volatile unsigned int PCK12SELR; 	// 0x028
	volatile unsigned int MPCKDIVR; 	// 0x02C
	volatile unsigned int AXIDIVR; 		// 0x030
	volatile unsigned int res3[2];      
	volatile unsigned int APB4DIVR; 	// 0x03C
	volatile unsigned int APB5DIVR; 	// 0x040
	volatile unsigned int RTCDIVR; 		// 0x044
	volatile unsigned int MSSCKSELR;    // 0x048
	volatile unsigned int res4[13];
	volatile unsigned int PLL1CR; 		// 0x080
	volatile unsigned int PLL1CFGR1; 	// 0x084
	volatile unsigned int PLL1CFGR2; 	// 0x088
	volatile unsigned int PLL1FRACR; 	// 0x08C
	volatile unsigned int PLL1CSGR;     // 0x090
	volatile unsigned int PLL2CR; 		// 0x094
	volatile unsigned int PLL2CFGR1; 	// 0x098
	volatile unsigned int PLL2CFGR2; 	// 0x09C
	volatile unsigned int PLL2FRACR;    // 0x0A0
	volatile unsigned int PLL2CSGR;     // 0x0A4
	volatile unsigned int res5[6];
	volatile unsigned int I2C46CKSELR;  // 0x0C0
	volatile unsigned int SPI6CKSELR;   // 0x0C4
	volatile unsigned int UART1CKSELR;  // 0x0C8
	volatile unsigned int RNG1CKSELR;   // 0x0CC
	volatile unsigned int CPERCKSELR;   // 0x0D0
	volatile unsigned int STGENCKSELR;  // 0x0D4
	volatile unsigned int DDRITFCR; 	// 0x0D8
	volatile unsigned int res6[9];
	volatile unsigned int MP_BOOTCR;  	// 0x100
	volatile unsigned int MP_SREQSETR;  // 0x104
	volatile unsigned int MP_SREQCLRR;  // 0x108
	volatile unsigned int MP_GCR;  		// 0x10C
	volatile unsigned int MP_APRSTCR; 	// 0x110 
	volatile unsigned int MP_APRSTSR;   // 0x114
	volatile unsigned int res7[10];
	volatile unsigned int BDCR; 		// 0x140
	volatile unsigned int RDLSICR;  	// 0x144
	volatile unsigned int res8[14];
	volatile unsigned int APB4RSTSETR; 	// 0x180
	volatile unsigned int APB4RSTCLRR; 	// 0x184
	volatile unsigned int APB5RSTSETR;  // 0x188
	volatile unsigned int APB5RSTCLRR;  // 0x18C
	volatile unsigned int AHB5RSTSETR;  // 0x190
	volatile unsigned int AHB5RSTCLRR;  // 0x194
	volatile unsigned int AHB6RSTSETR;  // 0x198
	volatile unsigned int AHB6RSTCLRR;  // 0x19C
	volatile unsigned int TZAHB6RSTSELR;// 0x1A0
	volatile unsigned int TZAHB6RSTCLRR;// 0x1A4
	volatile unsigned int res9[22];
	volatile unsigned int MP_APB4ENSETR;// 0x200
	volatile unsigned int MP_APB4ENCLRR;// 0x204
	volatile unsigned int MP_APB5ENSETR;// 0x208
	volatile unsigned int MP_APB5ENCLRR;// 0x20C
	volatile unsigned int MP_AHB5ENSETR;// 0x210
	volatile unsigned int MP_AHB5ENCLRR;// 0x214
	volatile unsigned int MP_AHB6ENSETR;// 0x218
	volatile unsigned int MP_AHB6ENCLRR;// 0x21C
	volatile unsigned int MP_TZAHB6ENSELR;// 0x220
	volatile unsigned int MP_TZAHB6ENCLRR;// 0x224
	volatile unsigned int res10[22];
	volatile unsigned int MC_APB4ENSETR; // 0x280
	volatile unsigned int MC_APB4ENCLRR; // 0x284
	volatile unsigned int MC_APB5ENSETR; // 0x288
	volatile unsigned int MC_APB5ENCLRR; // 0x28C
	volatile unsigned int MC_AHB5ENSETR; // 0x290
	volatile unsigned int MC_AHB5ENCLRR; // 0x294
	volatile unsigned int MC_AHB6ENSETR; // 0x298
	volatile unsigned int MC_AHB6ENCLRR; // 0x29C
	volatile unsigned int res11[24];
	volatile unsigned int MP_APB4LPENSETR; // 0x300
	volatile unsigned int MP_APB4LPENCLRR; // 0x304
	volatile unsigned int MP_APB5LPENSETR; // 0x308
	volatile unsigned int MP_APB5LPENCLRR; // 0x30C
	volatile unsigned int MP_AHB5LPENSETR; // 0x310
	volatile unsigned int MP_AHB5LPENCLRR; // 0x314
	volatile unsigned int MP_AHB6LPENSETR; // 0x318
	volatile unsigned int MP_AHB6LPENCLRR; // 0x31C
	volatile unsigned int MP_TZAHB6LPENSETR; // 0x320
	volatile unsigned int MP_TZAHB6LPENCLRR; // 0x324
	volatile unsigned int res12[22];
	volatile unsigned int MC_APB4LPENSETR; // 0x380
	volatile unsigned int MC_APB4LPENCLRR; // 0x384
	volatile unsigned int MC_APB5LPENSETR; // 0x388
	volatile unsigned int MC_APB5LPENCLRR; // 0x38C
	volatile unsigned int MC_AHB5LPENSETR; // 0x390
	volatile unsigned int MC_AHB5LPENCLRR; // 0x394
	volatile unsigned int MC_AHB6LPENSETR; // 0x398
	volatile unsigned int MC_AHB6LPENCLRR; // 0x39C
	volatile unsigned int res13[24];
	volatile unsigned int BR_RSTSCLRR; 		// 0x400
	volatile unsigned int MP_GRSTCSETR; 	// 0x404
	volatile unsigned int MP_RSTSR; 		// 0x408 
	volatile unsigned int MP_IWDGFZSETR; 	// 0x40C
	volatile unsigned int MP_IWDGFZCLRR;  	// 0x410
	volatile unsigned int MP_CIER; 			// 0x414
	volatile unsigned int MP_CIFR; 			// 0x418
	volatile unsigned int PWRLPDLYCR; 		// 0x41C
	volatile unsigned int MP_RSTSS; 		// 0x420
	volatile unsigned int res14[247];
	volatile unsigned int MCO1CFGR; 		// 0x800
	volatile unsigned int MCO2CFGR; 		// 0x804 
	volatile unsigned int OCRDYR; 			// 0x808
	volatile unsigned int DBGCFGR; 			// 0x80C
	volatile unsigned int res15[4];
	volatile unsigned int RCK3SELR; 		// 0x820
	volatile unsigned int RCK4SELR; 		// 0x824
	volatile unsigned int TIMG1PRER;  		// 0x828
	volatile unsigned int TIMG2PRER; 		// 0x82C
	volatile unsigned int MCUDIVR; 			// 0x830
	volatile unsigned int APB1DIVR; 		// 0x834
	volatile unsigned int APB2DIVR; 		// 0x838
	volatile unsigned int APB3DIVR; 		// 0x83C
	volatile unsigned int res16[16];
	volatile unsigned int PLL3CR;   		// 0x880
	volatile unsigned int PLL3CFGR1; 		// 0x884
	volatile unsigned int PLL3CFGR2; 		// 0x888
	volatile unsigned int PLL3FRACR; 		// 0x88C
	volatile unsigned int PLL3CSGR; 		// 0x890
	volatile unsigned int PLL4CR; 			// 0x894
	volatile unsigned int PLL4CFGR1; 		// 0x898
	volatile unsigned int PLL4CFGR2; 		// 0x89C
	volatile unsigned int PLL4FRACR; 		// 0x8A0
	volatile unsigned int PLL4CSGR; 		// 0x8A4
	volatile unsigned int res17[6];
	volatile unsigned int I2C12CKSELR; 		// 0x8C0
	volatile unsigned int I2C35CKSELR;  	// 0x8C4
	volatile unsigned int SAI1CKSELR; 		// 0x8C8
	volatile unsigned int SAI2CKSELR; 		// 0x8CC
	volatile unsigned int SAI3CKSELR; 		// 0x8D0
	volatile unsigned int SAI4CKSELR; 		// 0x8D4
	volatile unsigned int SPI2S1CKSELR; 	// 0x8D8
	volatile unsigned int SPI2S23CKSELR; 	// 0x8DC
	volatile unsigned int SPI45CKSELR; 		// 0x8E0
	volatile unsigned int UART6CKSELR; 		// 0x8E4
	volatile unsigned int UART24CKSELR; 	// 0x8E8
	volatile unsigned int UART35CKSELR; 	// 0x8EC
	volatile unsigned int UART78CKSELR; 	// 0x8F0
	volatile unsigned int SDMMC12CKSELR; 	// 0x8F4
	volatile unsigned int SDMMC3CKSELR; 	// 0x8F8
	volatile unsigned int ETHCKSELR; 		// 0x8FC
	volatile unsigned int QSPICKSELR; 		// 0x900
	volatile unsigned int FMCCKSELR; 		// 0x904
	volatile unsigned int res18[1];
	volatile unsigned int FDCANCKSELR; 		// 0x90C
	volatile unsigned int res19[1];
	volatile unsigned int SPDIFCKSELR; 		// 0x914
	volatile unsigned int CECCKSELR; 		// 0x918
	volatile unsigned int USBCKSELR; 		// 0x91C
	volatile unsigned int RNG2CKSELR;  		// 0x920
	volatile unsigned int DSICKSELR; 		// 0x924
	volatile unsigned int ADCCKSELR; 		// 0x928
	volatile unsigned int LPTIM45CKSELR; 	// 0x92C
	volatile unsigned int LPTIM23CKSELR;    // 0x930
	volatile unsigned int LPTIM1CKSELR; 	// 0x934
	volatile unsigned int res20[18];
	volatile unsigned int APB1RSTSETR; 		// 0x980
	volatile unsigned int APB1RSTCLRR; 		// 0x984
	volatile unsigned int APB2RSTSETR; 		// 0x988
	volatile unsigned int APB2RSTCLRR; 		// 0x98C
	volatile unsigned int APB3RSTSETR; 		// 0x990
	volatile unsigned int APB3RSTCLRR; 		// 0x994
	volatile unsigned int AHB2RSTSETR; 		// 0x998
	volatile unsigned int AHB2RSTCLRR;  	// 0x99C
	volatile unsigned int AHB3RSTSETR; 		// 0x9A0
	volatile unsigned int AHB3RSTCLRR; 		// 0x9A4
	volatile unsigned int AHB4RSTSETR; 		// 0x9A8
	volatile unsigned int AHB4RSTCLRR; 		// 0x9AC
	volatile unsigned int res21[20];
	volatile unsigned int MP_APB1ENSETR; 	// 0xA00
	volatile unsigned int MP_APB1ENCLRR; 	// 0xA04
	volatile unsigned int MP_APB2ENSETR; 	// 0xA08
	volatile unsigned int MP_APB2ENCLRR;  	// 0xA0C
	volatile unsigned int MP_APB3ENSETR; 	// 0xA10
	volatile unsigned int MP_APB3ENCLRR; 	// 0xA14
	volatile unsigned int MP_AHB2ENSETR; 	// 0xA18
	volatile unsigned int MP_AHB2ENCLRR; 	// 0xA1C
	volatile unsigned int MP_AHB3ENSETR; 	// 0xA20
	volatile unsigned int MP_AHB3ENCLRR; 	// 0xA24
	volatile unsigned int MP_AHB4ENSETR; 	// 0xA28
	volatile unsigned int MP_AHB4ENCLRR; 	// 0xA2C
	volatile unsigned int res22[2];
	volatile unsigned int MP_MLAHBENSETR; 	// 0xA38
	volatile unsigned int MP_MLAHBENCLRR; 	// 0xA3C
	volatile unsigned int res23[16];
	volatile unsigned int MC_APB1ENSETR; 	// 0xA80
	volatile unsigned int MC_APB1ENCLRR; 	// 0xA84
	volatile unsigned int MC_APB2ENSETR; 	// 0xA88
	volatile unsigned int MC_APB2ENCLRR; 	// 0xA8C
	volatile unsigned int MC_APB3ENSETR; 	// 0xA90
	volatile unsigned int MC_APB3ENCLRR; 	// 0xA94
	volatile unsigned int MC_AHB2ENSETR; 	// 0xA98
	volatile unsigned int MC_AHB2ENCLRR; 	// 0xA9C
	volatile unsigned int MC_AHB3ENSETR; 	// 0xAA0
	volatile unsigned int MC_AHB3ENCLRR; 	// 0xAA4
	volatile unsigned int MC_AHB4ENSETR; 	// 0xAA8
	volatile unsigned int MC_AHB4ENCLRR; 	// 0xAAC
	volatile unsigned int MC_AXIMENSETR; 	// 0xAB0
	volatile unsigned int MC_AXIMENCLRR; 	// 0xAB4
	volatile unsigned int MC_MLAHBENSETR; 	// 0xAB8
	volatile unsigned int MC_MLAHBENCLRR; 	// 0xABC
	volatile unsigned int res24[16];
	volatile unsigned int MP_APB1LPENSETR; 	// 0xB00
	volatile unsigned int MP_APB1LPENCLRR; 	// 0xB04
	volatile unsigned int MP_APB2LPENSETR;  // 0xB08
	volatile unsigned int MP_APB2LPENCLRR; 	// 0xB0C
	volatile unsigned int MP_APB3LPENSETR; 	// 0xB10
	volatile unsigned int MP_APB3LPENCLRR;  // 0xB14
	volatile unsigned int MP_AHB2LPENSETR;  // 0xB18
	volatile unsigned int MP_AHB2LPENCLRR;  // 0xB1C
	volatile unsigned int MP_AHB3LPENSETR;  // 0xB20
	volatile unsigned int MP_AHB3LPENCLRR;  // 0xB24
	volatile unsigned int MP_AHB4LPENSETR;  // 0xB28
	volatile unsigned int MP_AHB4LPENCLRR;  // 0xB2C
	volatile unsigned int MP_AXIMLPENSETR;  // 0xB30
	volatile unsigned int MP_AXIMLPENCLRR;  // 0xB34
	volatile unsigned int MP_MLAHBLPENSETR; // 0xB38
	volatile unsigned int MP_MLAHBLPENCLRR; // 0xB3C
	volatile unsigned int res25[16];
	volatile unsigned int MC_APB1LPENSETR;  // 0xB80
	volatile unsigned int MC_APB1LPENCLRR; 	// 0xB84
	volatile unsigned int MC_APB2LPENSETR;  // 0xB88
	volatile unsigned int MC_APB2LPENCLRR;  // 0xB8C
	volatile unsigned int MC_APB3LPENSETR;  // 0xB90 
	volatile unsigned int MC_APB3LPENCLRR;  // 0xB94
	volatile unsigned int MC_AHB2LPENSETR;  // 0xB98
	volatile unsigned int MC_AHB2LPENCLRR;  // 0xB9C
	volatile unsigned int MC_AHB3LPENSETR;  // 0xBA0 
	volatile unsigned int MC_AHB3LPENCLRR;  // 0xBA4
	volatile unsigned int MC_AHB4LPENSETR;  // 0xBA8
	volatile unsigned int MC_AHB4LPENCLRR;  // 0xBAC
	volatile unsigned int MC_AXIMLPENSETR;  // 0xBB0
	volatile unsigned int MC_AXIMLPENCLRR;  // 0xBB4
	volatile unsigned int MC_MLAHBLPENSETR; // 0xBB8
	volatile unsigned int MC_MLAHBLPENCLRR; // 0xBBC
	volatile unsigned int res26[16];
	volatile unsigned int MC_RSTSCLRR;  	// 0xC00
	volatile unsigned int res27[4];
	volatile unsigned int MC_CIER;  		// 0xC14
	volatile unsigned int MC_CIFR; 			// 0xC18
	volatile unsigned int res28[246];
	volatile unsigned int VERR; 			// 0xFF4
	volatile unsigned int IDR; 				// 0xFF8
	volatile unsigned int SIDR; 			// 0xFFC
}rcc_t;

#define RCC   ((rcc_t *)0x50000000)

#endif  // __STM32MP1XX_RCC_H__

stm32mp1xx_gpio.h

#ifndef __STM32MP1xx_GPIO_H__
#define __STM32MP1xx_GPIO_H__

typedef struct {
	volatile unsigned int MODER;   // 0x00
	volatile unsigned int OTYPER;  // 0x04
	volatile unsigned int OSPEEDR; // 0x08
	volatile unsigned int PUPDR;   // 0x0C
	volatile unsigned int IDR;     // 0x10
	volatile unsigned int ODR;     // 0x14
	volatile unsigned int BSRR;    // 0x18
	volatile unsigned int LCKR;    // 0x1C 
	volatile unsigned int AFRL;    // 0x20 
	volatile unsigned int AFRH;    // 0x24
	volatile unsigned int BRR;     // 0x28
	volatile unsigned int res;
	volatile unsigned int SECCFGR; // 0x30

}gpio_t;

#define  GPIOA   ((gpio_t *)0x50002000)
#define  GPIOB   ((gpio_t *)0x50003000)
#define  GPIOC   ((gpio_t *)0x50004000)
#define  GPIOD   ((gpio_t *)0x50005000)
#define  GPIOE   ((gpio_t *)0x50006000)
#define  GPIOF   ((gpio_t *)0x50007000)
#define  GPIOG   ((gpio_t *)0x50008000)
#define  GPIOH   ((gpio_t *)0x50009000)
#define  GPIOI   ((gpio_t *)0x5000A000)
#define  GPIOJ   ((gpio_t *)0x5000B000)
#define  GPIOK   ((gpio_t *)0x5000C000)
#define  GPIOZ   ((gpio_t *)0x54004000)


#endif // __STM32MP1xx_GPIO_H__

stm32mp1xx_exti.h

#ifndef __STM32MP1XX_EXTI_H__
#define __STM32MP1XX_EXTI_H__

typedef struct{
	volatile unsigned int RTSR1; 	// EXTI rising trigger selection register 	
	volatile unsigned int FTSR1; 	// EXTI falling trigger selection register	
	volatile unsigned int SWIER1;   // EXTI software interrupt event register 
	volatile unsigned int RPR1;     // EXTI rising edge pending register
	volatile unsigned int FPR1;  	// EXTI falling edge pending register
	volatile unsigned int TZENR1;   // EXTI TrustZone enable register
	volatile unsigned int RES1[2];  
	volatile unsigned int RTSR2;    // EXTI rising trigger selection register
	volatile unsigned int FTSR2;    // EXTI falling trigger selection register
	volatile unsigned int SWIER2;   // EXTI software interrupt event register
	volatile unsigned int RPR2;     // EXTI rising edge pending register
	volatile unsigned int FPR2;	    // EXTI falling edge pending register
	volatile unsigned int TZENR2;   // EXTI TrustZone enable register
	volatile unsigned int RES2[2];
	volatile unsigned int RTSR3;    // EXTI rising trigger selection register
	volatile unsigned int FTSR3;    // EXTI falling trigger selection register
	volatile unsigned int SWIER3;   // EXTI software interrupt event register
	volatile unsigned int RPR3;     // EXTI rising edge pending register
	volatile unsigned int FPR3;     // EXTI falling edge pending register
	volatile unsigned int TZENR3;   // EXTI TrustZone enable register
	volatile unsigned int RES3[2];
	volatile unsigned int EXTICR1;	// EXTI external interrupt selection register 1
	volatile unsigned int EXTICR2;  // EXTI external interrupt selection register 2	
	volatile unsigned int EXTICR3;  // EXTI external interrupt selection register 3	
	volatile unsigned int EXTICR4;  // EXTI external interrupt selection register 4	
	volatile unsigned int RES4[4];
	volatile unsigned int C1IMR1;   // EXTI CPU1 wakeup with interrupt mask register
	volatile unsigned int C1EMR1;   // EXTI CPU1 wakeup with event mask register
	volatile unsigned int RES5[2];
	volatile unsigned int C1IMR2;   // EXTI CPU1 wakeup with interrupt mask register
	volatile unsigned int C1EMR2;   // EXTI CPU1 wakeup with event mask register
	volatile unsigned int RES6[2];
	volatile unsigned int C1IMR3;   // EXTI CPU1 wakeup with interrupt mask register	
	volatile unsigned int C1EMR3;   // EXTI CPU1 wakeup with event mask register 
	volatile unsigned int RES7[6];
	volatile unsigned int C2IMR1;   // EXTI CPU2 wakeup with interrupt mask register
	volatile unsigned int C2EMR1;   // EXTI CPU2 wakeup with event mask register
	volatile unsigned int RES8[2];
	volatile unsigned int C2IMR2;   // EXTI CPU2 wakeup with interrupt mask register
	volatile unsigned int C2EMR2;   // EXTI CPU2 wakeup with event mask register
	volatile unsigned int RES9[2];
	volatile unsigned int C2IMR3;   // EXTI CPU2 wakeup with interrupt mask register 
	volatile unsigned int C2EMR3;   // EXTI CPU2 wakeup with event mask register 
	volatile unsigned int RES10[2];
}exti_t;

#define  EXTI   ((exti_t*)0x5000D000)

#endif //__STM32MP1XX_EXTI_H__

stm32mp1xx_gic.h

#ifndef __STM32MP1XX_GIC_H__
#define __STM32MP1XX_GIC_H__ 


typedef struct {
	volatile unsigned int CTRL;
	volatile unsigned int TYPER;
	volatile unsigned int IIDR;
	volatile unsigned int RES1[29];
	volatile unsigned int IGROUPR[9];
	volatile unsigned int RES2[23];
	volatile unsigned int ISENABLER[9];
	volatile unsigned int RES3[23];
	volatile unsigned int ICENABLER[9];
	volatile unsigned int RES4[23];
	volatile unsigned int ISPENDR[9];
	volatile unsigned int RES5[23];
	volatile unsigned int ICPENDR[9];
	volatile unsigned int RES6[23];
	volatile unsigned int ISACTIVER[9];
	volatile unsigned int RES7[23];
	volatile unsigned int ICACTIVER[9];
	volatile unsigned int RES8[23];
	volatile unsigned int IPRIORITYR[72];
	volatile unsigned int RES9[184];
	volatile unsigned int ITARGETSR[72];
	volatile unsigned int RES10[184];	
	volatile unsigned int ICFGR[18];
	volatile unsigned int RES11[46];

}gicd_t;
#define GICD  ((gicd_t*)0xA0021000)


typedef struct {
	volatile unsigned int CTRL;
	volatile unsigned int PMR;
	volatile unsigned int BRR;
	volatile unsigned int IAR;
	volatile unsigned int EOIR;
	volatile unsigned int RPR;
	volatile unsigned int HPPIR;
	volatile unsigned int ABPR;
	volatile unsigned int AIAR;
	volatile unsigned int AEOIR;
	volatile unsigned int AHPPIR;
	volatile unsigned int RES1[41];
	volatile unsigned int APR0;
	volatile unsigned int RES2[3];
	volatile unsigned int NSAPR0;
	volatile unsigned int RES3[6];
	volatile unsigned int IIDR;
	volatile unsigned int RES4[960];
	volatile unsigned int DIRDIR;

}gicc_t;
#define GICC  ((gicc_t*)0xA0022000) 

#endif  // __STM32MP1XX_GIC_H__

key.h

#ifndef __KEY_H__
#define __KEY_H__

#include "stm32mp1xx_rcc.h"
#include "stm32mp1xx_gpio.h"
#include "stm32mp1xx_exti.h"
#include "stm32mp1xx_gic.h"

//GPIO章节初始化
void hal_key_init();

//EXTI章节初始化
void hal_exti_init();

//GIC章节初始化
void hal_gic_init();

#endif

key.c

#include "key.h"

//GPIO章节初始化
void hal_key_init()
{
    //设置GPIOF组寄存器时钟使能
    RCC->MP_AHB4ENSETR |= (0x1 << 5);

    //设置PF9(key1)为输入模式
    GPIOF->MODER &= (~(0x3 << 18));

    //设置PF8(key3)为输入模式
    GPIOF->MODER &= (~(0x3 << 16));

    //设置PF7(key2)为输入模式
    GPIOF->MODER &= (~(0x3 << 14));
}

//EXTI章节初始化
void hal_exti_init()
{
    //将PF9(key1)引脚与EXTI9事件绑定，9/4=2...1----->EXTICR3[15:8]=0x5
    EXTI->EXTICR3 &= (~(0xff << 8));
    EXTI->EXTICR3 |= (0x5 << 8);

    //将PF8(key3)引脚与EXTI8事件绑定，8/4=2...0----->EXTICR3[7:0]=0x5
    EXTI->EXTICR3 &= (~(0xff << 0));
    EXTI->EXTICR3 |= (0x5 << 0);

    //将PF7(key2)引脚与EXTI7事件绑定，7/4=1...3----->EXTICR2[31:24]=0x5
    EXTI->EXTICR2 &= (~(0xff << 24));
    EXTI->EXTICR2 |= (0x5 << 24);
    
    //将PF9(key1)引脚设置为下降沿中断触发
    //将PF8(key3)引脚设置为下降沿中断触发
    //将PF7(key2)引脚设置为下降沿中断触发   FTSR1[9:7]=0x111
    EXTI->FTSR1 &= (~(0x7 << 7));
    EXTI->FTSR1 |= (0x7 << 7);

    //将PF9(key1)引脚设置为中断不屏蔽
    //将PF8(key3)引脚设置为中断不屏蔽
    //将PF7(key2)引脚设置为中断不屏蔽   C1IMR1[9:7]=0x111
    EXTI->C1IMR1 &= (~(0x7 << 7));
    EXTI->C1IMR1 |= (0x7 << 7);

    //将PF9(key1)引脚的中断挂起标志位清空
    //将PF8(key3)引脚的中断挂起标志位清空
    //将PF7(key2)引脚的中断挂起标志位清空   FPR1[9:7]=0x111
    EXTI->FPR1 |= (0x7 << 7);
}

//GIC章节初始化
void hal_gic_init()
{
    /*******GICD层初始化*******/
    // 设置GICD层使能
    GICD->CTRL |= 0x1;

    // 设置GICD层中断使能
    //key1--->PF9--->EXTI9--->中断号99--->99/32=3...3--->ISENABLER3[3]=1
    //key3--->PF8--->EXTI8--->中断号98--->98/32=3...2--->ISENABLER3[2]=1
    //key2--->PF7--->EXTI7--->中断号97--->97/32=3...1--->ISENABLER3[1]=1
    GICD->ISENABLER[3] |= (0x7<<1);

    // 设置PF9(key1)引脚的中断优先级为9
    // key1--->PF9--->EXTI9--->中断号99--->99/4=24...3--->IPRIORITYR24[31:27]=0x9
    GICD->IPRIORITYR[24] |= (0x9 << 27);
    // 设置PF8(key3)引脚的中断优先级为8
    // key3--->PF8--->EXTI8--->中断号98--->98/32=24...2--->ISENABLER24[23:19]=0x8
    GICD->IPRIORITYR[24] |= (0x8 << 19);
    // 设置PF7(key2)引脚的中断优先级为7
    // key2--->PF7--->EXTI7--->中断号97--->97/32=24...1--->ISENABLER24[15:11]=0x7
    GICD->IPRIORITYR[24] |= (0x7 << 11);

    // 将PF7、PF8、PF9的中断信号分配给CPU0
    //key1--->PF9--->EXTI9--->中断号99--->99/4=24...3--->ITARGETSR24[25:24]=0x01
    GICD->ITARGETSR[24] |= (0x1 << 24);
    // key3--->PF8--->EXTI8--->中断号98--->98/4=24...2--->ITARGETSR24[17:16]=0x01
    GICD->ITARGETSR[24] |= (0x1 << 16);
    // key2--->PF7--->EXTI7--->中断号97--->97/4=24...1--->ITARGETSR24[9:8]=0x01
    GICD->ITARGETSR[24] |= (0x1 << 8);

    // 清空GICD层的中断挂起标志位
    //key1--->PF9--->EXTI9--->中断号99--->99/32=3...3--->ICPENDR3[3]=1
    //key3--->PF8--->EXTI8--->中断号98--->98/32=3...2--->ICPENDR3[2]=1
    //key2--->PF7--->EXTI7--->中断号97--->97/32=3...1--->ICPENDR3[1]=1
    GICD->ICPENDR[3] |= (0x7<<1);

    /*******GICC层初始化*******/
    // 设置GICC层使能
    GICC->CTRL |= 0x1;

    // 设置GICC层的中断优先级屏蔽寄存器，该寄存器的值要比GICD层设置的值要大 PMR[7:3]=0xA
    GICC->PMR |= (0xA << 3);
}

led.h

#ifndef __LED_H__
#define __LED_H__

#include "stm32mp1xx_rcc.h"
#include "stm32mp1xx_gpio.h"

#define GPIO_PIN_0 0U
#define GPIO_PIN_1 1U
#define GPIO_PIN_2 2U
#define GPIO_PIN_3 3U
#define GPIO_PIN_4 4U
#define GPIO_PIN_5 5U
#define GPIO_PIN_6 6U
#define GPIO_PIN_7 7U
#define GPIO_PIN_8 8U
#define GPIO_PIN_9 9U
#define GPIO_PIN_10 10U
#define GPIO_PIN_11 11U
#define GPIO_PIN_12 12U
#define GPIO_PIN_13 13U
#define GPIO_PIN_14 14U
#define GPIO_PIN_15 15U

typedef enum
{
    INPUT,
    OUTPUT,
    ALT,
    ANALOG
}gpio_mode_t;

typedef enum
{
    PP,
    OD
}gpio_type_t;

typedef enum
{
    LOW,
    MID,
    HIGH,
    VERY_HIGH
}gpio_speed_t;

typedef enum
{
    NO_PUPD,
    PU,
    PD
}gpio_pupd_t;

typedef enum
{
    GPIO_RESET,
    GPIO_SET
}gpio_statu_t;

typedef struct {
    gpio_mode_t moder;
    gpio_type_t typer;
    gpio_speed_t speedr;
    gpio_pupd_t pupdr;
}gpio_init_t;

//RCC章节初始化
void hal_rcc_init();

//GPIO章节初始化
void hal_gpio_init(gpio_t *gpiox,gpio_init_t *init,unsigned int pin);

//GPIO引脚输出数据
void hal_gpio_write(gpio_t *gpiox,unsigned int pin,gpio_statu_t statu);

#endif

led.c

#include "led.h"

//RCC章节初始化
void hal_rcc_init()
{
    //使能GPIOE和GPIOF组的时钟
    RCC->MP_AHB4ENSETR |= (0x3 << 4);
}

//GPIO章节初始化
void hal_gpio_init(gpio_t *gpiox,gpio_init_t *init,unsigned int pin)
{
    gpiox->MODER &= (~(0x3 << (pin * 2)));
    gpiox->MODER |= (init->moder << (pin * 2));

    gpiox->OTYPER &= (~(0x1 << pin));
    gpiox->OTYPER |= (init->typer << pin);

    gpiox->OSPEEDR &= (~(0x3 << (pin * 2)));
    gpiox->OSPEEDR |= (init->speedr << (pin * 2));

    gpiox->PUPDR &= (~(0x3 << (pin * 2)));
    gpiox->PUPDR |= (init->pupdr << (pin * 2));
}

//GPIO引脚输出数据
void hal_gpio_write(gpio_t *gpiox,unsigned int pin,gpio_statu_t statu)
{
    if(statu==GPIO_RESET){
        gpiox->ODR &= (~(0x1 << pin));
    }else if(statu==GPIO_SET){
        gpiox->ODR |= (0x1 << pin);
    }
}

do_irq.c

#include "stm32mp1xx_gic.h"
#include "stm32mp1xx_exti.h"
#include "led.h"

extern void printf(const char *fmt, ...);
unsigned int i = 0;
void do_irq(void) 
{
    static int led1_key = 0, led2_key = 0, led3_key = 0;
    int irq_num = 0;
    //获取中断号
    irq_num = GICC->IAR;
    switch (irq_num)
    {
    case 99:
        printf("key1 down########\n");
        led1_key = !led1_key;
        if(led1_key){
            hal_gpio_write(GPIOE, GPIO_PIN_10, GPIO_SET);
        }else{
            hal_gpio_write(GPIOE, GPIO_PIN_10, GPIO_RESET);
        }
        //清空挂起标志位
        GICD->ICPENDR[3] |= (0x1 << 3);
        EXTI->FPR1 |= (0x1 << 9);
        break;
    case 98:
        printf("key3 down########\n");
        led3_key = !led3_key;
        if(led3_key){
            hal_gpio_write(GPIOE, GPIO_PIN_8, GPIO_SET);
        }else{
            hal_gpio_write(GPIOE, GPIO_PIN_8, GPIO_RESET);
        }
        //清空挂起标志位
        GICD->ICPENDR[3] |= (0x1 << 2);
        EXTI->FPR1 |= (0x1 << 8);
        break;
    case 97:
        printf("key2 down########\n");
        led2_key = !led2_key;
        if(led2_key){
            hal_gpio_write(GPIOF, GPIO_PIN_10, GPIO_SET);
        }else{
            hal_gpio_write(GPIOF, GPIO_PIN_10, GPIO_RESET);
        }
        //清空挂起标志位
        GICD->ICPENDR[3] |= (0x1 << 1);
        EXTI->FPR1 |= (0x1 << 7);
        break;
    }
    //清除中断号
    GICC->EOIR = irq_num;
}

main.c

#include "key.h"
#include "led.h"

extern void printf(const char *fmt, ...);

void delay_ms(int ms)
{
	int i,j;
	for(i = 0; i < ms;i++)
		for (j = 0; j < 1800; j++);
}

void led_init()
{
	gpio_init_t init = {
		OUTPUT,
		PP,
		LOW,
		NO_PUPD
	};
	hal_rcc_init();
	hal_gpio_init(GPIOE,&init,GPIO_PIN_10);
	hal_gpio_init(GPIOF,&init,GPIO_PIN_10);
	hal_gpio_init(GPIOE,&init,GPIO_PIN_8);
}

int main()
{
	hal_key_init();
	hal_exti_init();
	hal_gic_init();
	led_init();
	while(1)
	{
		
	}

	return 0;
}

实验现象：

key1按键按下，串口打印相关信息，led1灯的状态反转；

key2按键按下，串口打印相关信息，led2灯的状态反转；

key3按键按下，串口打印相关信息，led3灯的状态反转。