library IEEE;
use IEEE.std_logic_1164.ALL;
---消抖模块,其实是利用了40ms的clk信号对按键值进行采样,因为采样周期大于按键抖动时间(14ms左右)而---
---又小于按下键的时间(至少0.1s),就保证了跳过抖动阶段----------------------------------------------
entity xiaodou is
port(clk:in std_logic;
keyin:in std_logic;
keyout:out std_logic);
end xiaodou;
architecture behav of xiaodou is
begin
process(clk)
begin
if rising_edge(clk) then
keyout<=keyin;
end if;
end process;
end behav;